component
STM32C031K4U6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFQFPN-32(5x5). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
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README.mdadded+69@@ -0,0 +1,69 @@+# STM32C031K4U6++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · UFQFPN-32(5x5)++STM32C031K4U6 from STMicroelectronics, in a UFQFPN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | PB9 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions IR_OUT, USART2_RTS_DE_CK, TIM17_CH1, TIM3_CH2, I2C1_SDA, EVENTOUT. |+| 2 | PC14-OSCX_IN | bidirectional | 5 V-tolerant I/O (PC14 at reset) with OSCX_IN oscillator input additional function and AFs USART1_TX, TIM1_ETR, TIM1_BKIN2, IR_OUT, USART2_RTS_DE_CK, TIM17_CH1, TIM3_CH2, I2C1_SDA, EVENTOUT. |+| 3 | PC15-OSCX_OUT | bidirectional | 5 V-tolerant I/O (PC15 at reset) with OSCX_OUT oscillator output additional function and AFs OSC32_EN, OSC_EN, TIM1_ETR, TIM3_CH3. |+| 4 | VDD/VDDA | power_in | Digital and analog supply pin; operating range 2.0 V to 3.6 V, to be decoupled with 100 nF plus 4.7 µF ceramic capacitors close to the pin. |+| 5 | VSS/VSSA | power_in | Digital and analog ground pin. |+| 6 | PF2-NRST | bidirectional | Bidirectional reset pin with embedded weak pull-up (FT); alternate functions MCO, TIM1_CH4; additional function NRST. |+| 7 | PA0 | bidirectional | 5 V-tolerant I/O with AFs USART2_CTS, TIM16_CH1, USART1_TX, TIM1_CH1; additional functions ADC_IN0, WKUP1. |+| 8 | PA1 | bidirectional | 5 V-tolerant I/O with AFs SPI1_SCK/I2S1_CK, USART2_RTS_DE_CK, TIM17_CH1, USART1_RX, TIM1_CH2, I2C1_SMBA, EVENTOUT; additional function ADC_IN1. |+| 9 | PA2 | bidirectional | 5 V-tolerant I/O with AFs SPI1_MOSI/I2S1_SD, USART2_TX, TIM16_CH1N, TIM3_ETR, TIM1_CH3; additional functions ADC_IN2, WKUP4, LSCO. |+| 10 | PA3 | bidirectional | 5 V-tolerant I/O with AFs USART2_RX, TIM1_CH1N, TIM1_CH4, EVENTOUT; additional function ADC_IN3. |+| 11 | PA4 | bidirectional | 5 V-tolerant I/O with AFs SPI1_NSS/I2S1_WS, USART2_TX, TIM1_CH2N, TIM14_CH1, TIM17_CH1N, EVENTOUT; additional functions ADC_IN4, RTC_TS, RTC_OUT1, WKUP2. |+| 12 | PA5 | bidirectional | 5 V-tolerant I/O with AFs SPI1_SCK/I2S1_CK, USART2_RX, TIM1_CH3N, TIM1_CH1, EVENTOUT; additional function ADC_IN5. |+| 13 | PA6 | bidirectional | 5 V-tolerant I/O with AFs SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BKIN, TIM16_CH1; additional function ADC_IN6. |+| 14 | PA7 | bidirectional | 5 V-tolerant I/O with AFs SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM1_CH1N, TIM14_CH1, TIM17_CH1; additional function ADC_IN7. |+| 15 | PB0 | bidirectional | 5 V-tolerant I/O with AFs SPI1_NSS/I2S1_WS, TIM3_CH3, TIM1_CH2N; additional function ADC_IN17. |+| 16 | PB1 | bidirectional | 5 V-tolerant I/O with AFs TIM14_CH1, TIM3_CH4, TIM1_CH3N, TIM1_CH2N, EVENTOUT; additional function ADC_IN18. |+| 17 | PB2 | bidirectional | 5 V-tolerant I/O with AFs USART1_RX, MCO2, EVENTOUT; additional function ADC_IN19. |+| 18 | PA8 | bidirectional | 5 V-tolerant I/O with AFs MCO, USART2_TX, TIM1_CH1, EVENTOUT, SPI1_NSS/I2S1_WS, TIM1_CH2N, TIM1_CH3N, TIM3_CH3, TIM3_CH4, TIM14_CH1, USART1_RX, MCO2; additional function ADC_IN8. |+| 19 | PA9 | bidirectional | 5 V-tolerant I/O with AFs MCO, USART1_TX, TIM1_CH2, TIM3_ETR, I2C1_SCL, EVENTOUT; can be remapped in place of PA11 via SYSCFG_CFGR1. |+| 20 | PC6 | bidirectional | 5 V-tolerant I/O with alternate function TIM3_CH1. |+| 21 | PA10 | bidirectional | 5 V-tolerant I/O with AFs USART1_RX, TIM1_CH3, MCO2, TIM17_BKIN, I2C1_SDA, EVENTOUT; can be remapped in place of PA12 via SYSCFG_CFGR1. |+| 22 | PA11 [PA9] | bidirectional | 5 V-tolerant I/O with AFs SPI1_MISO/I2S1_MCK, USART1_CTS, TIM1_CH4, TIM1_BKIN2; additional function ADC_IN11; PA9 can be remapped onto this pin via SYSCFG_CFGR1. |+| 23 | PA12 [PA10] | bidirectional | 5 V-tolerant I/O with AFs SPI1_MOSI/I2S1_SD, USART1_RTS_DE_CK, TIM1_ETR, I2S_CKIN; additional function ADC_IN12; PA10 can be remapped onto this pin via SYSCFG_CFGR1. |+| 24 | PA13 | bidirectional | 5 V-tolerant I/O, SWDIO at reset with internal pull-up active; AFs IR_OUT, TIM3_ETR, USART2_RX, EVENTOUT; additional function ADC_IN13. |+| 25 | PA14-BOOT0 | bidirectional | 5 V-tolerant I/O, SWCLK at reset with internal pull-down active; AFs USART2_TX, EVENTOUT, SPI1_NSS/I2S1_WS, USART2_RX, TIM1_CH1, MCO2, USART1_RTS_DE_CK; additional functions ADC_IN14, BOOT0. |+| 26 | PA15 | bidirectional | 5 V-tolerant I/O with AFs SPI1_NSS/I2S1_WS, USART2_RX, TIM1_CH1, MCO2, USART1_RTS_DE_CK, EVENTOUT. |+| 27 | PB3 | bidirectional | 5 V-tolerant I/O with AFs SPI1_SCK/I2S1_CK, TIM1_CH2, TIM3_CH2, USART1_RTS_DE_CK, EVENTOUT. |+| 28 | PB4 | bidirectional | 5 V-tolerant I/O with AFs SPI1_MISO/I2S1_MCK, TIM3_CH1, USART1_CTS, TIM17_BKIN, EVENTOUT. |+| 29 | PB5 | bidirectional | 5 V-tolerant I/O with AFs SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM16_BKIN, TIM3_CH3, I2C1_SMBA; additional function WKUP6. |+| 30 | PB6 | bidirectional | 5 V-tolerant I/O with AFs USART1_TX, TIM1_CH3, TIM16_CH1N, TIM3_CH3, USART1_RTS_DE_CK, USART1_CTS, I2C1_SCL, I2C1_SMBA, SPI1 signals, TIM1_CH2, TIM3_CH1/CH2, TIM16_BKIN, TIM17_BKIN; additional function WKUP3. |+| 31 | PB7 | bidirectional | 5 V-tolerant I/O with AFs USART1_RX, TIM1_CH4, TIM17_CH1N, TIM3_CH4, I2C1_SDA, EVENTOUT, USART2_CTS, TIM16_CH1, TIM3_CH1, I2C1_SCL; additional function RTC_REFIN. |+| 32 | PB8 | bidirectional | 5 V-tolerant I/O with AFs USART2_CTS, TIM16_CH1, TIM3_CH1, I2C1_SCL, EVENTOUT. |+| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | UFQFPN-32(5x5) |+| Category | Embedded Processors & Controllers |+| Pins | 33 |++## CAD (KiCad official)++- Symbol: `STM32C031K4U6`+- Footprint: `Package_DFN_QFN:UFQFPN-32-1EP_5x5mm_P0.5mm_EP3.5x3.5mm`+- 3D model: UFQFPN-32(5x5) (KiCad packages3D, STEP)+- 3D model files: `stm32c031k4u6-etched.step` / `stm32c031k4u6-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32c031k4u6.step` / `stm32c031k4u6.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603002641173790720) (108 pp, sha256 `c0de50247b672919`, retrieved 2026-10-03, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm32c031k4u6-datasheet.pdf)
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Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "embedded processors & controllers",+ "stm32c031k4u6",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "stm32c031k4u6.kicad_sym",+ "stm32c031k4u6.kicad_mod",+ "stm32c031k4u6.glb",+ "stm32c031k4u6.step",+ "stm32c031k4u6.lbr",+ "docs/hero.png",+ "docs/stm32c031k4u6-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "stm32c031k4u6-hero.glb",+ "stm32c031k4u6-hero.overlay.json"+ ],+ "component": {+ "mpn": "STM32C031K4U6",+ "manufacturer": "STMicroelectronics",+ "package": "UFQFPN-32(5x5)",+ "pin_count": 33,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603002641173790720",+ "parts": {+ "symbol": "stm32c031k4u6.kicad_sym",+ "footprint": "stm32c031k4u6.kicad_mod",+ "model_3d": "stm32c031k4u6-hero.glb",+ "model_3d_plain": "stm32c031k4u6.glb",+ "model_3d_step": "stm32c031k4u6-etched.step",+ "model_3d_step_plain": "stm32c031k4u6.step",+ "lbr": "stm32c031k4u6.lbr"+ },+ "distributor_links": {+ "lcsc": 5456141,+ "digikey": "497-STM32C031K4U6-ND",+ "mouser": "511-STM32C031K4U6"+ },+ "distributor_check": {+ "checked_at": "2026-10-03T05:40:16Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-STM32C031K4U6-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "511-STM32C031K4U6",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "PB9",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O (FT) with alternate functions IR_OUT, USART2_RTS_DE_CK, TIM17_CH1, TIM3_CH2, I2C1_SDA, EVENTOUT."+ },+ {+ "number": "2",+ "name": "PC14-OSCX_IN",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O (PC14 at reset) with OSCX_IN oscillator input additional function and AFs USART1_TX, TIM1_ETR, TIM1_BKIN2, IR_OUT, USART2_RTS_DE_CK, TIM17_CH1, TIM3_CH2, I2C1_SDA, EVENTOUT."+ },+ {+ "number": "3",+ "name": "PC15-OSCX_OUT",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O (PC15 at reset) with OSCX_OUT oscillator output additional function and AFs OSC32_EN, OSC_EN, TIM1_ETR, TIM3_CH3."+ },+ {+ "number": "4",+ "name": "VDD/VDDA",+ "type": "power_in",+ "description": "Digital and analog supply pin; operating range 2.0 V to 3.6 V, to be decoupled with 100 nF plus 4.7 µF ceramic capacitors close to the pin."+ },+ {+ "number": "5",+ "name": "VSS/VSSA",+ "type": "power_in",+ "description": "Digital and analog ground pin."+ },+ {+ "number": "6",+ "name": "PF2-NRST",+ "type": "bidirectional",+ "description": "Bidirectional reset pin with embedded weak pull-up (FT); alternate functions MCO, TIM1_CH4; additional function NRST."+ },+ {+ "number": "7",+ "name": "PA0",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O with AFs USART2_CTS, TIM16_CH1, USART1_TX, TIM1_CH1; additional functions ADC_IN0, WKUP1."+ },+ {+ "number": "8",+ "name": "PA1",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O with AFs SPI1_SCK/I2S1_CK, USART2_RTS_DE_CK, TIM17_CH1, USART1_RX, TIM1_CH2, I2C1_SMBA, EVENTOUT; additional function ADC_IN1."+ },+ {+ "number": "9",+ "name": "PA2",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O with AFs SPI1_MOSI/I2S1_SD, USART2_TX, TIM16_CH1N, TIM3_ETR, TIM1_CH3; additional functions ADC_IN2, WKUP4, LSCO."+ },+ {+ "number": "10",+ "name": "PA3",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O with AFs USART2_RX, TIM1_CH1N, TIM1_CH4, EVENTOUT; additional function ADC_IN3."+ },+ {+ "number": "11",+ "name": "PA4",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O with AFs SPI1_NSS/I2S1_WS, USART2_TX, TIM1_CH2N, TIM14_CH1, TIM17_CH1N, EVENTOUT; additional functions ADC_IN4, RTC_TS, RTC_OUT1, WKUP2."+ },+ {+ "number": "12",+ "name": "PA5",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O with AFs SPI1_SCK/I2S1_CK, USART2_RX, TIM1_CH3N, TIM1_CH1, EVENTOUT; additional function ADC_IN5."+ },+ {+ "number": "13",+ "name": "PA6",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O with AFs SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BKIN, TIM16_CH1; additional function ADC_IN6."+ },+ {+ "number": "14",+ "name": "PA7",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O with AFs SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM1_CH1N, TIM14_CH1, TIM17_CH1; additional function ADC_IN7."+ },+ {+ "number": "15",+ "name": "PB0",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O with AFs SPI1_NSS/I2S1_WS, TIM3_CH3, TIM1_CH2N; additional function ADC_IN17."+ },+ {+ "number": "16",+ "name": "PB1",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O with AFs TIM14_CH1, TIM3_CH4, TIM1_CH3N, TIM1_CH2N, EVENTOUT; additional function ADC_IN18."+ },+ {+ "number": "17",+ "name": "PB2",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O with AFs USART1_RX, MCO2, EVENTOUT; additional function ADC_IN19."+ },+ {+ "number": "18",+ "name": "PA8",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O with AFs MCO, USART2_TX, TIM1_CH1, EVENTOUT, SPI1_NSS/I2S1_WS, TIM1_CH2N, TIM1_CH3N, TIM3_CH3, TIM3_CH4, TIM14_CH1, USART1_RX, MCO2; additional function ADC_IN8."+ },+ {+ "number": "19",+ "name": "PA9",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O with AFs MCO, USART1_TX, TIM1_CH2, TIM3_ETR, I2C1_SCL, EVENTOUT; can be remapped in place of PA11 via SYSCFG_CFGR1."+ },+ {+ "number": "20",+ "name": "PC6",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O with alternate function TIM3_CH1."+ },+ {+ "number": "21",+ "name": "PA10",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O with AFs USART1_RX, TIM1_CH3, MCO2, TIM17_BKIN, I2C1_SDA, EVENTOUT; can be remapped in place of PA12 via SYSCFG_CFGR1."+ },+ {+ "number": "22",+ "name": "PA11 [PA9]",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O with AFs SPI1_MISO/I2S1_MCK, USART1_CTS, TIM1_CH4, TIM1_BKIN2; additional function ADC_IN11; PA9 can be remapped onto this pin via SYSCFG_CFGR1."+ },+ {+ "number": "23",+ "name": "PA12 [PA10]",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O with AFs SPI1_MOSI/I2S1_SD, USART1_RTS_DE_CK, TIM1_ETR, I2S_CKIN; additional function ADC_IN12; PA10 can be remapped onto this pin via SYSCFG_CFGR1."+ },+ {+ "number": "24",+ "name": "PA13",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O, SWDIO at reset with internal pull-up active; AFs IR_OUT, TIM3_ETR, USART2_RX, EVENTOUT; additional function ADC_IN13."+ },+ {+ "number": "25",+ "name": "PA14-BOOT0",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O, SWCLK at reset with internal pull-down active; AFs USART2_TX, EVENTOUT, SPI1_NSS/I2S1_WS, USART2_RX, TIM1_CH1, MCO2, USART1_RTS_DE_CK; additional functions ADC_IN14, BOOT0."+ },+ {+ "number": "26",+ "name": "PA15",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O with AFs SPI1_NSS/I2S1_WS, USART2_RX, TIM1_CH1, MCO2, USART1_RTS_DE_CK, EVENTOUT."+ },+ {+ "number": "27",+ "name": "PB3",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O with AFs SPI1_SCK/I2S1_CK, TIM1_CH2, TIM3_CH2, USART1_RTS_DE_CK, EVENTOUT."+ },+ {+ "number": "28",+ "name": "PB4",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O with AFs SPI1_MISO/I2S1_MCK, TIM3_CH1, USART1_CTS, TIM17_BKIN, EVENTOUT."+ },+ {+ "number": "29",+ "name": "PB5",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O with AFs SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM16_BKIN, TIM3_CH3, I2C1_SMBA; additional function WKUP6."+ },+ {+ "number": "30",+ "name": "PB6",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O with AFs USART1_TX, TIM1_CH3, TIM16_CH1N, TIM3_CH3, USART1_RTS_DE_CK, USART1_CTS, I2C1_SCL, I2C1_SMBA, SPI1 signals, TIM1_CH2, TIM3_CH1/CH2, TIM16_BKIN, TIM17_BKIN; additional function WKUP3."+ },+ {+ "number": "31",+ "name": "PB7",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O with AFs USART1_RX, TIM1_CH4, TIM17_CH1N, TIM3_CH4, I2C1_SDA, EVENTOUT, USART2_CTS, TIM16_CH1, TIM3_CH1, I2C1_SCL; additional function RTC_REFIN."+ },+ {+ "number": "32",+ "name": "PB8",+ "type": "bidirectional",+ "description": "5 V-tolerant I/O with AFs USART2_CTS, TIM16_CH1, TIM3_CH1, I2C1_SCL, EVENTOUT."+ },+ {+ "number": "33",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Pin numbering discrepancy between Figure 6 (STM32C031KxU UFQFPN32 pinout diagram) and Table 12 (Pin ; Exposed pad (VSS) shown in figure was not assigned a specific pin number in the diagram; typically n",+ "exposed pad 33 added from the footprint",+ "1/33 pins cited to the wrong page (name found elsewhere): ['9:PB9@p35']"+ ],+ "pages_sent": 50,+ "cost_usd": 0.4,+ "at": "2026-10-03T05:39:49"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603002641173790720",+ "pages": 108,+ "sha256": "c0de50247b672919",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 33,+ "described": 33,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}