component
STL60N32N3LL-VB
Public Made by Adomby adom
VBsemi Elec MOSFETs, DFN5x6-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
stl60n32n3ll-vb: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero
4 files changed
+4720−13765
docs/hero.png⋯ 1 unchanged line ⋯
stl60n32n3ll-vb-etched.fit.json+1−1@@ -1 +1 @@-{"orientation_deg": 0, "font_size_mm": 0.5758, "legible_estimate": true, "natural_up": null, "overflow": false}+{"orientation_deg": 0, "font_size_mm": 0.5758, "reading": {"source": "pin1_xy", "pin1_xy": [-2.8, 1.905], "dot": [-2.4, 1.9], "dot_agrees": true}, "legible_estimate": true, "natural_up": null, "overflow": false}
stl60n32n3ll-vb-etched.glb⋯ 1 unchanged line ⋯
stl60n32n3ll-vb-etched.step+4719−13764@@ -1,7 +1,7 @@ ISO-10303-21; HEADER; FILE_DESCRIPTION(('Open CASCADE Model'),'2;1');-FILE_NAME('Open CASCADE Shape Model','2026-09-25T08:55:38',('Author'),(+FILE_NAME('Open CASCADE Shape Model','2026-10-03T04:57:54',('Author'),( 'Open CASCADE'),'Open CASCADE STEP processor 7.8','Open CASCADE 7.8' ,'Unknown'); FILE_SCHEMA(('AUTOMOTIVE_DESIGN { 1 0 10303 214 1 1 1 1 }'));@@ -49,13957 +49,4912 @@ GLOBAL_UNCERTAINTY_ASSIGNED_CONTEXT((#27)) GLOBAL_UNIT_ASSIGNED_CONTEXT( #33 = PRODUCT('Adom.Chip','Adom.Chip','',(#34)); #34 = PRODUCT_CONTEXT('',#2,'mechanical'); #35 = PRODUCT_DEFINITION_CONTEXT('part definition',#2,'design');-#36 = ADVANCED_BREP_SHAPE_REPRESENTATION('',(#11,#37),#2007);-#37 = MANIFOLD_SOLID_BREP('',#38);-#38 = CLOSED_SHELL('',(#39,#87,#118,#142,#166,#190,#207,#518,#641,#665,- #705,#821,#846,#886,#919,#944,#977,#1017,#1042,#1082,#1115,#1140,- #1173,#1213,#1238,#1278,#1311,#1336,#1369,#1409,#1434,#1474,#1507,- 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