STL60N32N3LL-VB

@@ -0,0 +1,44 @@+# STL60N32N3LL-VB++**VBsemi Elec** · MOSFETs · DFN5x6-8++STL60N32N3LL-VB from VBsemi Elec, in a DFN5x6-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | G1 | input | Gate of MOSFET Q1 (high-side FET in the half-bridge). VGS(th) typ 1.0-2.5 V, VGS abs max ±20 V. Drives the top FET whose source is the PHASE (S1/D2) node. |+| 2 | D1 | passive | Drain of MOSFET Q1 (high-side). Pins 2, 3 and 4 are ganged together as the D1 lead. Typically tied to the input supply rail (VIN) in a synchronous-buck power stage. |+| 3 | D1 | passive | Drain of MOSFET Q1 (high-side), ganged with pins 2 and 4. Multiple pins are provided to reduce lead resistance/inductance and to spread current/heat. |+| 4 | D1 | passive | Drain of MOSFET Q1 (high-side), ganged with pins 2 and 3. |+| 5 | S2 | passive | Source of MOSFET Q2 (low-side FET in the half-bridge). Pins 5, 6 and 7 are ganged together as the S2 lead. Typically tied to PGND in a synchronous-buck power stage. |+| 6 | S2 | passive | Source of MOSFET Q2 (low-side), ganged with pins 5 and 7. Multiple pins reduce lead resistance/inductance. |+| 7 | S2 | passive | Source of MOSFET Q2 (low-side), ganged with pins 5 and 6. |+| 8 | G2 | input | Gate of MOSFET Q2 (low-side FET in the half-bridge). VGS(th) typ 1.0-2.5 V, VGS abs max ±20 V. |+| 9 | S1/D2 | passive | Exposed thermal/electrical pad - internally tied source of Q1 to drain of Q2, forming the switch (PHASE / SW / LX) node of the half-bridge. Carries the full switched load current; must be soldered to a large copper area both for the electrical connection and for heat sinking. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | VBsemi Elec |+| Package | DFN5x6-8 |+| Category | Transistors/Thyristors |+| Pins | 9 |++## CAD (KiCad official)++- Symbol: `STL60N32N3LL-VB`+- Footprint: `Package_DFN_QFN:DFN-S-8-1EP_6x5mm_P1.27mm`+- 3D model: DFN5x6-8 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [VBsemi Elec datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8604413219969134592) (None pp, sha256 `9ccdbe6791781a25`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stl60n32n3ll-vb-datasheet.pdf)

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