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Initial commit: component/stgap2scm

Ray ·582e735c2a ·16h ago
2 files changed +242
README.mdadded+44
@@ -0,0 +1,44 @@+# STGAP2SCM++**STMicroelectronics** · Isolators - Gate Drivers · SO-8++STGAP2SCM from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VDD | power_in | Logic supply voltage, recommended operating range 3.1 to 5.5 V. |+| 2 | IN+ | input | Active high logic input with hysteresis threshold 0.62 to 0.70 × VDD. |+| 3 | IN- | input | Active low logic input with hysteresis threshold 0.29 to 0.37 × VDD. |+| 4 | GND | power_in | Logic ground reference. |+| 5 | VH | power_in | Gate driving voltage supply, recommended 9.6 to 26 V, UVLO turn-on threshold 8.6 to 9.6 V. |+| 6 | GOUT | output | Sink/source gate driver output with 4 A capability at 25°C, output voltage range 96 mV (low) to VH-0.15 V (high). |+| 7 | CLAMP | output | Active Miller clamp output with 1.3 to 2.6 V trigger threshold and 4 A sink capability at 25°C. |+| 8 | GNDISO | power_in | Isolated gate driving ground reference. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | SO-8 |+| Category | Power Management (PMIC) |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `STGAP2SCM`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SO-8 (KiCad packages3D, STEP)+- 3D model files: `stgap2scm-etched.step` / `stgap2scm-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stgap2scm.step` / `stgap2scm.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603119121689026560) (23 pp, sha256 `c88ffafc488db499`, retrieved 2026-10-07, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stgap2scm-datasheet.pdf)
page.jsonadded+198
@@ -0,0 +1,198 @@+{+  "slug": "stgap2scm",+  "version": "0.1.0",+  "type": "component",+  "description": "STMicroelectronics Isolators - Gate Drivers, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "power management (pmic)",+    "stgap2scm",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "stgap2scm.kicad_sym",+    "stgap2scm.kicad_mod",+    "stgap2scm.glb",+    "stgap2scm.step",+    "stgap2scm.lbr",+    "docs/hero.png",+    "docs/stgap2scm-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "stgap2scm-hero.glb",+    "stgap2scm-hero.overlay.json"+  ],+  "component": {+    "mpn": "STGAP2SCM",+    "manufacturer": "STMicroelectronics",+    "package": "SO-8",+    "pin_count": 8,+    "category": "Power Management (PMIC)",+    "subcategory": "Isolators - Gate Drivers",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603119121689026560",+    "parts": {+      "symbol": "stgap2scm.kicad_sym",+      "footprint": "stgap2scm.kicad_mod",+      "model_3d": "stgap2scm-hero.glb",+      "model_3d_plain": "stgap2scm.glb",+      "model_3d_step": "stgap2scm-etched.step",+      "model_3d_step_plain": "stgap2scm.step",+      "lbr": "stgap2scm.lbr"+    },+    "distributor_links": {+      "lcsc": "C5267659",+      "digikey": "497-STGAP2SCMTR-ND",+      "mouser": "511-STGAP2SCM"+    },+    "distributor_check": {+      "checked_at": "2026-10-07T03:11:06Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "497-STGAP2SCMTR-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "511-STGAP2SCM",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "VDD",+        "type": "power_in",+        "description": "Logic supply voltage, recommended operating range 3.1 to 5.5 V."+      },+      {+        "number": "2",+        "name": "IN+",+        "type": "input",+        "description": "Active high logic input with hysteresis threshold 0.62 to 0.70 × VDD."+      },+      {+        "number": "3",+        "name": "IN-",+        "type": "input",+        "description": "Active low logic input with hysteresis threshold 0.29 to 0.37 × VDD."+      },+      {+        "number": "4",+        "name": "GND",+        "type": "power_in",+        "description": "Logic ground reference."+      },+      {+        "number": "5",+        "name": "VH",+        "type": "power_in",+        "description": "Gate driving voltage supply, recommended 9.6 to 26 V, UVLO turn-on threshold 8.6 to 9.6 V."+      },+      {+        "number": "6",+        "name": "GOUT",+        "type": "output",+        "description": "Sink/source gate driver output with 4 A capability at 25°C, output voltage range 96 mV (low) to VH-0.15 V (high)."+      },+      {+        "number": "7",+        "name": "CLAMP",+        "type": "output",+        "description": "Active Miller clamp output with 1.3 to 2.6 V trigger threshold and 4 A sink capability at 25°C."+      },+      {+        "number": "8",+        "name": "GNDISO",+        "type": "power_in",+        "description": "Isolated gate driving ground reference."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [],+        "pages_sent": 23,+        "cost_usd": 0.121,+        "at": "2026-10-07T03:10:49"+      },+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603119121689026560",+        "pages": 23,+        "sha256": "c88ffafc488db499",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 8,+        "described": 8,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "stgap2scm.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6,+          4.9,+          1.75+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "stgap2scm-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6,+          4.9,+          1.75+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "6452960d38f99966f62a8409dbcb536229642e34790d04f28d94176c7e4aa0ac",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file