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Initial commit: component/std2n95k5

Ray ·5aa160543c ·1mo ago
2 files changed +152
README.mdadded+39
@@ -0,0 +1,39 @@+# STD2N95K5++**STMicroelectronics** · MOSFETs · DPAK++STD2N95K5 from STMicroelectronics, in a DPAK. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | Gate | input | Gate control terminal with ±30 V absolute maximum gate-source voltage, 3-5 V gate threshold voltage at VDS = VGS and ID = 100 μA, and 10 nC total gate charge at VDD = 760 V and ID = 2 A. |+| 2 | Drain | output | Drain terminal rated for 2 A continuous drain current at TC = 25°C (1.3 A at 100°C), 950 V drain-source voltage, 4.2-5 Ω on-resistance at VGS = 10 V and ID = 1 A, 8 A pulsed drain current, and electrically and thermally connected to package heat sink tab. |+| 3 | Source | power_in | Source return terminal with integrated back-to-back zener diodes providing ±30 V gate-source protection and body diode rated for 2 A continuous source-drain current (8 A pulsed) with 1.5 V forward voltage drop. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | DPAK |+| Category | Transistors/Thyristors |+| Pins | 3 |++## CAD (KiCad official)++- Symbol: `STD2N95K5`+- Footprint: `Package_TO_SOT_SMD:TO-252-2`+- 3D model: DPAK (KiCad packages3D, STEP)+- 3D model files: `std2n95k5-etched.step` / `std2n95k5-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `std2n95k5.step` / `std2n95k5.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588885410721882112) (23 pp, sha256 `9772ec265cefabdd`, retrieved 2026-09-22, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/std2n95k5-datasheet.pdf)
page.jsonadded+113
@@ -0,0 +1,113 @@+{+  "slug": "std2n95k5",+  "version": "0.1.0",+  "type": "component",+  "description": "STMicroelectronics MOSFETs, DPAK. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "transistors-thyristors",+    "std2n95k5",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "std2n95k5.kicad_sym",+    "std2n95k5.kicad_mod",+    "std2n95k5.glb",+    "std2n95k5.step",+    "std2n95k5.lbr",+    "docs/hero.png",+    "docs/std2n95k5-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "STD2N95K5",+    "manufacturer": "STMicroelectronics",+    "package": "DPAK",+    "pin_count": 3,+    "category": "Transistors/Thyristors",+    "subcategory": "MOSFETs",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588885410721882112",+    "parts": {+      "symbol": "std2n95k5.kicad_sym",+      "footprint": "std2n95k5.kicad_mod",+      "model_3d": "std2n95k5-etched.glb",+      "model_3d_plain": "std2n95k5.glb",+      "model_3d_step": "std2n95k5-etched.step",+      "model_3d_step_plain": "std2n95k5.step",+      "lbr": "std2n95k5.lbr"+    },+    "distributor_links": {+      "lcsc": "C361031"+    },+    "pins": [+      {+        "number": "1",+        "name": "Gate",+        "type": "input",+        "description": "Gate control terminal with ±30 V absolute maximum gate-source voltage, 3-5 V gate threshold voltage at VDS = VGS and ID = 100 μA, and 10 nC total gate charge at VDD = 760 V and ID = 2 A."+      },+      {+        "number": "2",+        "name": "Drain",+        "type": "output",+        "description": "Drain terminal rated for 2 A continuous drain current at TC = 25°C (1.3 A at 100°C), 950 V drain-source voltage, 4.2-5 Ω on-resistance at VGS = 10 V and ID = 1 A, 8 A pulsed drain current, and electrically and thermally connected to package heat sink tab."+      },+      {+        "number": "3",+        "name": "Source",+        "type": "power_in",+        "description": "Source return terminal with integrated back-to-back zener diodes providing ±30 V gate-source protection and body diode rated for 2 A continuous source-drain current (8 A pulsed) with 1.5 V forward voltage drop."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: Explicit pin number to terminal (Gate/Drain/Source) assignments are NOT documented in this datasheet"+        ],+        "pages_sent": 23,+        "cost_usd": 0.1687,+        "at": "2026-09-22T18:04:00"+      },+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588885410721882112",+        "pages": 23,+        "sha256": "9772ec265cefabdd",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 3,+        "described": 3,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file