component
STC8G1K17-38I-TSSOP20
Public Made by Adomby adom
STC Micro Microcontrollers (MCU/MPU/SOC), TSSOP-20. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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stc8g1k17-38i-tssop20: factory component page (tier=lcsc)
3 files changed
+62−59
README.md+23−23@@ -8,26 +8,26 @@ STC8G1K17-38I-TSSOP20 from STC Micro, in a TSSOP-20. Pinout and pin descriptions | Pin | Name | Type | Function | |---|---|---|---|-| 1 | P1.2/T2/ECI/SS/ADC2 | bidirectional | Standard GPIO P1.2. Muxed alt-functions: Timer 2 external clock input (T2), PCA external pulse input (ECI), SPI slave select (SS, I/O), ADC analog input channel 2 (ADC2). |-| 2 | P1.3/T2CLKO/MOSI/ADC3 | bidirectional | Standard GPIO P1.3. Alt-functions: Timer 2 clock divider output (T2CLKO), SPI MOSI (master output/slave input), ADC channel 3 (ADC3). |-| 3 | P1.4/I2CSDA/MISO/ADC4 | bidirectional | Standard GPIO P1.4. Alt-functions: I2C data line (SDA), SPI MISO (master input/slave output), ADC channel 4 (ADC4). |-| 4 | P1.5/I2CSCL/SCLK/ADC5 | bidirectional | Standard GPIO P1.5. Alt-functions: I2C clock line (SCL), SPI clock (SCLK), ADC channel 5 (ADC5). |-| 5 | P1.6/XTALO/MCLKO_2/RxD_3/ADC6 | bidirectional | Standard GPIO P1.6. Alt-functions: external crystal output (XTALO), master clock divider output alt-2 (MCLKO_2), UART1 RxD alt-3 (RxD_3), ADC channel 6 (ADC6). |-| 6 | P1.7/XTALI/TxD_3/ADC7 | bidirectional | Standard GPIO P1.7. Alt-functions: external crystal input (XTALI), UART1 TxD alt-3 (TxD_3), ADC channel 7 (ADC7). |-| 7 | P5.4/nRST/MCLKO | bidirectional | Standard GPIO P5.4 by default; can be configured (via ISP option) as active-low reset input (nRST). Alt-function: master clock output (MCLKO). When used as reset, internal 4K pull-up is always enabled; as GPIO, pull-up is enabled for ~6.5 ms at power-up before auto-disabling. |-| 8 | Vcc/AVcc/ADC_VRef+ | power_in | Chip supply (Vcc) and ADC supply (AVcc); also serves as ADC external reference input (ADC_VRef+). Supply range 1.9-5.5 V. Place a 10 uF (or larger) bulk cap and a 0.1 uF decoupling cap close to this pin. VRef+ must not be left floating (leakage) - if precision is not required, tie to MCU VCC. |-| 9 | P5.5 | bidirectional | Standard GPIO P5.5. No alternate functions listed for this variant. |-| 10 | Gnd/AGnd | power_in | Digital ground (Gnd) and ADC analog ground (AGnd). Combined into a single pin on this package. |-| 11 | P3.0/RxD/INT4/ADC8 | bidirectional | Standard GPIO P3.0. Alt-functions: UART1 receive (RxD), external interrupt 4 (INT4), ADC channel 8 (ADC8). Powers up in weak pull-up / quasi-bidirectional mode (unlike most GPIOs which default to high-impedance). |-| 12 | P3.1/TxD/ADC9 | bidirectional | Standard GPIO P3.1. Alt-functions: UART1 transmit (TxD), ADC channel 9 (ADC9). Powers up in weak pull-up / quasi-bidirectional mode. |-| 13 | P3.2/INT0/ADC10/SCL_4/SCLK_4 | bidirectional | Standard GPIO P3.2. Alt-functions: external interrupt 0 (INT0), ADC channel 10 (ADC10), I2C clock alt-4 (SCL_4), SPI clock alt-4 (SCLK_4). |-| 14 | P3.3/INT1/ADC11/SDA_4/MISO_4 | bidirectional | Standard GPIO P3.3. Alt-functions: external interrupt 1 (INT1), ADC channel 11 (ADC11), I2C data alt-4 (SDA_4), SPI MISO alt-4 (MISO_4). |-| 15 | P3.4/T0/T1CLKO/ADC12/ECI_2/CMPO/MOSI_4 | bidirectional | Standard GPIO P3.4. Alt-functions: Timer 0 external clock (T0), Timer 1 clock divider output (T1CLKO), ADC channel 12 (ADC12), PCA external input alt-2 (ECI_2), comparator output (CMPO), SPI MOSI alt-4 (MOSI_4). |-| 16 | P3.5/T1/T0CLKO/ADC13/CCP0_2/SS_4 | bidirectional | Standard GPIO P3.5. Alt-functions: Timer 1 external clock (T1), Timer 0 clock divider output (T0CLKO), ADC channel 13 (ADC13), PCA capture/PWM CCP0 alt-2 (CCP0_2), SPI slave-select alt-4 (SS_4). |-| 17 | P3.6/INT2/RxD_2/ADC14/CCP1_2/CMP- | bidirectional | Standard GPIO P3.6. Alt-functions: external interrupt 2 (INT2), UART1 RxD alt-2 (RxD_2), ADC channel 14 (ADC14), PCA CCP1 alt-2 (CCP1_2), comparator negative input (CMP-). |-| 18 | P3.7/INT3/TxD_2/CCP2/CCP2_2/CMP+ | bidirectional | Standard GPIO P3.7. Alt-functions: external interrupt 3 (INT3), UART1 TxD alt-2 (TxD_2), PCA CCP2 (default and alt-2 mapping), comparator positive input (CMP+). |-| 19 | P1.0/RxD2/ADC0/CCP1 | bidirectional | Standard GPIO P1.0. Alt-functions: UART2 receive (RxD2), ADC channel 0 (ADC0), PCA CCP1 capture/PWM output. |-| 20 | P1.1/TxD2/ADC1/CCP0 | bidirectional | Standard GPIO P1.1. Alt-functions: UART2 transmit (TxD2), ADC channel 1 (ADC1), PCA CCP0 capture/PWM output. |+| 1 | P1.2/ADC2/SS/T2/ECI | bidirectional | Standard I/O port P1.2. Muxed with ADC channel 2 input, SPI slave-select (SS), Timer 2 external clock input (T2), and PCA external pulse input (ECI). |+| 2 | P1.3/ADC3/MOSI/T2CLKO | bidirectional | Standard I/O port P1.3. Muxed with ADC channel 3 input, SPI master-out/slave-in (MOSI), and Timer 2 clock divided output (T2CLKO). |+| 3 | P1.4/ADC4/MISO/SDA | bidirectional | Standard I/O port P1.4. Muxed with ADC channel 4 input, SPI master-in/slave-out (MISO), and I2C data line (SDA). |+| 4 | P1.5/ADC5/SCLK/SCL | bidirectional | Standard I/O port P1.5. Muxed with ADC channel 5 input, SPI clock (SCLK), and I2C clock line (SCL). |+| 5 | P1.6/ADC6/RxD_3/MCLKO_2/XTALO | bidirectional | Standard I/O port P1.6. Muxed with ADC channel 6, UART1 receive (alt 3), master clock divided output (alt 2), and external crystal output (XTALO). |+| 6 | P1.7/ADC7/TxD_3/XTALI | bidirectional | Standard I/O port P1.7. Muxed with ADC channel 7, UART1 transmit (alt 3), and external crystal input (XTALI). |+| 7 | P5.4/nRST/MCLKO | bidirectional | Standard I/O port P5.4. Configurable via ISP option as active-low reset input (nRST) or master clock divided output (MCLKO). When configured as reset the internal 4k pull-up is always enabled; as GPIO the pull-up stays enabled for ~6.5ms at power-up before auto-disabling. |+| 8 | VCC/AVCC/ADC_VRef+ | power_in | Positive supply pin for the MCU digital core, analog VCC, and the ADC positive reference input (ADC_VRef+). Supply range 1.9-5.5V. If a separate ADC reference is not driven, tie ADC_VRef+ to MCU VCC (floating causes leakage). |+| 9 | P5.5 | bidirectional | Standard I/O port P5.5 with no alternate functions on this package. |+| 10 | GND/AGND | power_in | Ground reference for digital core (Gnd) and analog/ADC (AGnd). Combined on a single package pin. |+| 11 | P3.0/RxD/ADC8/INT4 | bidirectional | Standard I/O port P3.0. Muxed with UART1 receive (RxD), ADC channel 8, and external interrupt 4 (INT4). Powers up in weak pull-up quasi-bidirectional mode. |+| 12 | P3.1/TxD/ADC9 | bidirectional | Standard I/O port P3.1. Muxed with UART1 transmit (TxD) and ADC channel 9. Powers up in weak pull-up quasi-bidirectional mode. |+| 13 | P3.2/INT0/ADC10/SCL_4/SCLK_4 | bidirectional | Standard I/O port P3.2. Muxed with external interrupt 0 (INT0), ADC channel 10, I2C clock (SCL alt 4), and SPI clock (SCLK alt 4). |+| 14 | P3.3/INT1/ADC11/SDA_4/MISO_4 | bidirectional | Standard I/O port P3.3. Muxed with external interrupt 1 (INT1), ADC channel 11, I2C data (SDA alt 4), and SPI MISO (alt 4). |+| 15 | P3.4/T0/T1CLKO/ADC12/ECI_2/CMPO/MOSI_4 | bidirectional | Standard I/O port P3.4. Muxed with Timer 0 external clock (T0), Timer 1 divided clock output (T1CLKO), ADC channel 12, PCA external pulse input (ECI alt 2), comparator output (CMPO), and SPI MOSI (alt 4). |+| 16 | P3.5/T1/T0CLKO/ADC13/CCP0_2/SS_4 | bidirectional | Standard I/O port P3.5. Muxed with Timer 1 external clock (T1), Timer 0 divided clock output (T0CLKO), ADC channel 13, PCA CCP0 capture/PWM (alt 2), and SPI slave-select (SS alt 4). |+| 17 | P3.6/INT2/RxD_2/ADC14/CCP1_2/CMP- | bidirectional | Standard I/O port P3.6. Muxed with external interrupt 2 (INT2), UART1 receive (alt 2), ADC channel 14, PCA CCP1 capture/PWM (alt 2), and comparator negative input (CMP-). |+| 18 | P3.7/INT3/TxD_2/CCP2/CCP2_2/CMP+ | bidirectional | Standard I/O port P3.7. Muxed with external interrupt 3 (INT3), UART1 transmit (alt 2), PCA CCP2 capture/PWM (default and alt 2 groups), and comparator positive input (CMP+). |+| 19 | P1.0/RxD2/ADC0/CCP1 | bidirectional | Standard I/O port P1.0. Muxed with UART2 receive (RxD2), ADC channel 0, and PCA CCP1 capture/PWM. |+| 20 | P1.1/TxD2/ADC1/CCP0 | bidirectional | Standard I/O port P1.1. Muxed with UART2 transmit (TxD2), ADC channel 1, and PCA CCP0 capture/PWM. | ## Key specifications @@ -40,9 +40,9 @@ STC8G1K17-38I-TSSOP20 from STC Micro, in a TSSOP-20. Pinout and pin descriptions ## Ordering variants -- `STC8G1K17-38I-TSSOP2038I-TSSOP20`-- `STC8G1K17-38I-TSSOP2038I-QFN20`-- `STC8G1K17-38I-TSSOP2038I-SOP16`+- `STC8G1K17-38I-TSSOP20`+- `STC8G1K17-38I-TSSOP20STC8G1K17-38I-QFN20`+- `STC8G1K17-38I-TSSOP20STC8G1K17-38I-SOP16` ## CAD (KiCad official)
page.json+30−33@@ -30,123 +30,123 @@ "pins": [ { "number": "1",- "name": "P1.2/T2/ECI/SS/ADC2",+ "name": "P1.2/ADC2/SS/T2/ECI", "type": "bidirectional",- "description": "Standard GPIO P1.2. Muxed alt-functions: Timer 2 external clock input (T2), PCA external pulse input (ECI), SPI slave select (SS, I/O), ADC analog input channel 2 (ADC2)."+ "description": "Standard I/O port P1.2. Muxed with ADC channel 2 input, SPI slave-select (SS), Timer 2 external clock input (T2), and PCA external pulse input (ECI)." }, { "number": "2",- "name": "P1.3/T2CLKO/MOSI/ADC3",+ "name": "P1.3/ADC3/MOSI/T2CLKO", "type": "bidirectional",- "description": "Standard GPIO P1.3. Alt-functions: Timer 2 clock divider output (T2CLKO), SPI MOSI (master output/slave input), ADC channel 3 (ADC3)."+ "description": "Standard I/O port P1.3. Muxed with ADC channel 3 input, SPI master-out/slave-in (MOSI), and Timer 2 clock divided output (T2CLKO)." }, { "number": "3",- "name": "P1.4/I2CSDA/MISO/ADC4",+ "name": "P1.4/ADC4/MISO/SDA", "type": "bidirectional",- "description": "Standard GPIO P1.4. Alt-functions: I2C data line (SDA), SPI MISO (master input/slave output), ADC channel 4 (ADC4)."+ "description": "Standard I/O port P1.4. Muxed with ADC channel 4 input, SPI master-in/slave-out (MISO), and I2C data line (SDA)." }, { "number": "4",- "name": "P1.5/I2CSCL/SCLK/ADC5",+ "name": "P1.5/ADC5/SCLK/SCL", "type": "bidirectional",- "description": "Standard GPIO P1.5. Alt-functions: I2C clock line (SCL), SPI clock (SCLK), ADC channel 5 (ADC5)."+ "description": "Standard I/O port P1.5. Muxed with ADC channel 5 input, SPI clock (SCLK), and I2C clock line (SCL)." }, { "number": "5",- "name": "P1.6/XTALO/MCLKO_2/RxD_3/ADC6",+ "name": "P1.6/ADC6/RxD_3/MCLKO_2/XTALO", "type": "bidirectional",- "description": "Standard GPIO P1.6. Alt-functions: external crystal output (XTALO), master clock divider output alt-2 (MCLKO_2), UART1 RxD alt-3 (RxD_3), ADC channel 6 (ADC6)."+ "description": "Standard I/O port P1.6. Muxed with ADC channel 6, UART1 receive (alt 3), master clock divided output (alt 2), and external crystal output (XTALO)." }, { "number": "6",- "name": "P1.7/XTALI/TxD_3/ADC7",+ "name": "P1.7/ADC7/TxD_3/XTALI", "type": "bidirectional",- "description": "Standard GPIO P1.7. Alt-functions: external crystal input (XTALI), UART1 TxD alt-3 (TxD_3), ADC channel 7 (ADC7)."+ "description": "Standard I/O port P1.7. Muxed with ADC channel 7, UART1 transmit (alt 3), and external crystal input (XTALI)." }, { "number": "7", "name": "P5.4/nRST/MCLKO", "type": "bidirectional",- "description": "Standard GPIO P5.4 by default; can be configured (via ISP option) as active-low reset input (nRST). Alt-function: master clock output (MCLKO). When used as reset, internal 4K pull-up is always enabled; as GPIO, pull-up is enabled for ~6.5 ms at power-up before auto-disabling."+ "description": "Standard I/O port P5.4. Configurable via ISP option as active-low reset input (nRST) or master clock divided output (MCLKO). When configured as reset the internal 4k pull-up is always enabled; as GPIO the pull-up stays enabled for ~6.5ms at power-up before auto-disabling." }, { "number": "8",- "name": "Vcc/AVcc/ADC_VRef+",+ "name": "VCC/AVCC/ADC_VRef+", "type": "power_in",- "description": "Chip supply (Vcc) and ADC supply (AVcc); also serves as ADC external reference input (ADC_VRef+). Supply range 1.9-5.5 V. Place a 10 uF (or larger) bulk cap and a 0.1 uF decoupling cap close to this pin. VRef+ must not be left floating (leakage) - if precision is not required, tie to MCU VCC."+ "description": "Positive supply pin for the MCU digital core, analog VCC, and the ADC positive reference input (ADC_VRef+). Supply range 1.9-5.5V. If a separate ADC reference is not driven, tie ADC_VRef+ to MCU VCC (floating causes leakage)." }, { "number": "9", "name": "P5.5", "type": "bidirectional",- "description": "Standard GPIO P5.5. No alternate functions listed for this variant."+ "description": "Standard I/O port P5.5 with no alternate functions on this package." }, { "number": "10",- "name": "Gnd/AGnd",+ "name": "GND/AGND", "type": "power_in",- "description": "Digital ground (Gnd) and ADC analog ground (AGnd). Combined into a single pin on this package."+ "description": "Ground reference for digital core (Gnd) and analog/ADC (AGnd). Combined on a single package pin." }, { "number": "11",- "name": "P3.0/RxD/INT4/ADC8",+ "name": "P3.0/RxD/ADC8/INT4", "type": "bidirectional",- "description": "Standard GPIO P3.0. Alt-functions: UART1 receive (RxD), external interrupt 4 (INT4), ADC channel 8 (ADC8). Powers up in weak pull-up / quasi-bidirectional mode (unlike most GPIOs which default to high-impedance)."+ "description": "Standard I/O port P3.0. Muxed with UART1 receive (RxD), ADC channel 8, and external interrupt 4 (INT4). Powers up in weak pull-up quasi-bidirectional mode." }, { "number": "12", "name": "P3.1/TxD/ADC9", "type": "bidirectional",- "description": "Standard GPIO P3.1. Alt-functions: UART1 transmit (TxD), ADC channel 9 (ADC9). Powers up in weak pull-up / quasi-bidirectional mode."+ "description": "Standard I/O port P3.1. Muxed with UART1 transmit (TxD) and ADC channel 9. Powers up in weak pull-up quasi-bidirectional mode." }, { "number": "13", "name": "P3.2/INT0/ADC10/SCL_4/SCLK_4", "type": "bidirectional",- "description": "Standard GPIO P3.2. Alt-functions: external interrupt 0 (INT0), ADC channel 10 (ADC10), I2C clock alt-4 (SCL_4), SPI clock alt-4 (SCLK_4)."+ "description": "Standard I/O port P3.2. Muxed with external interrupt 0 (INT0), ADC channel 10, I2C clock (SCL alt 4), and SPI clock (SCLK alt 4)." }, { "number": "14", "name": "P3.3/INT1/ADC11/SDA_4/MISO_4", "type": "bidirectional",- "description": "Standard GPIO P3.3. Alt-functions: external interrupt 1 (INT1), ADC channel 11 (ADC11), I2C data alt-4 (SDA_4), SPI MISO alt-4 (MISO_4)."+ "description": "Standard I/O port P3.3. Muxed with external interrupt 1 (INT1), ADC channel 11, I2C data (SDA alt 4), and SPI MISO (alt 4)." }, { "number": "15", "name": "P3.4/T0/T1CLKO/ADC12/ECI_2/CMPO/MOSI_4", "type": "bidirectional",- "description": "Standard GPIO P3.4. Alt-functions: Timer 0 external clock (T0), Timer 1 clock divider output (T1CLKO), ADC channel 12 (ADC12), PCA external input alt-2 (ECI_2), comparator output (CMPO), SPI MOSI alt-4 (MOSI_4)."+ "description": "Standard I/O port P3.4. Muxed with Timer 0 external clock (T0), Timer 1 divided clock output (T1CLKO), ADC channel 12, PCA external pulse input (ECI alt 2), comparator output (CMPO), and SPI MOSI (alt 4)." }, { "number": "16", "name": "P3.5/T1/T0CLKO/ADC13/CCP0_2/SS_4", "type": "bidirectional",- "description": "Standard GPIO P3.5. Alt-functions: Timer 1 external clock (T1), Timer 0 clock divider output (T0CLKO), ADC channel 13 (ADC13), PCA capture/PWM CCP0 alt-2 (CCP0_2), SPI slave-select alt-4 (SS_4)."+ "description": "Standard I/O port P3.5. Muxed with Timer 1 external clock (T1), Timer 0 divided clock output (T0CLKO), ADC channel 13, PCA CCP0 capture/PWM (alt 2), and SPI slave-select (SS alt 4)." }, { "number": "17", "name": "P3.6/INT2/RxD_2/ADC14/CCP1_2/CMP-", "type": "bidirectional",- "description": "Standard GPIO P3.6. Alt-functions: external interrupt 2 (INT2), UART1 RxD alt-2 (RxD_2), ADC channel 14 (ADC14), PCA CCP1 alt-2 (CCP1_2), comparator negative input (CMP-)."+ "description": "Standard I/O port P3.6. Muxed with external interrupt 2 (INT2), UART1 receive (alt 2), ADC channel 14, PCA CCP1 capture/PWM (alt 2), and comparator negative input (CMP-)." }, { "number": "18", "name": "P3.7/INT3/TxD_2/CCP2/CCP2_2/CMP+", "type": "bidirectional",- "description": "Standard GPIO P3.7. Alt-functions: external interrupt 3 (INT3), UART1 TxD alt-2 (TxD_2), PCA CCP2 (default and alt-2 mapping), comparator positive input (CMP+)."+ "description": "Standard I/O port P3.7. Muxed with external interrupt 3 (INT3), UART1 transmit (alt 2), PCA CCP2 capture/PWM (default and alt 2 groups), and comparator positive input (CMP+)." }, { "number": "19", "name": "P1.0/RxD2/ADC0/CCP1", "type": "bidirectional",- "description": "Standard GPIO P1.0. Alt-functions: UART2 receive (RxD2), ADC channel 0 (ADC0), PCA CCP1 capture/PWM output."+ "description": "Standard I/O port P1.0. Muxed with UART2 receive (RxD2), ADC channel 0, and PCA CCP1 capture/PWM." }, { "number": "20", "name": "P1.1/TxD2/ADC1/CCP0", "type": "bidirectional",- "description": "Standard GPIO P1.1. Alt-functions: UART2 transmit (TxD2), ADC channel 1 (ADC1), PCA CCP0 capture/PWM output."+ "description": "Standard I/O port P1.1. Muxed with UART2 transmit (TxD2), ADC channel 1, and PCA CCP0 capture/PWM." } ], "provenance": {@@ -210,8 +210,5 @@ "docs/stc8g1k17-38i-tssop20-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": {- "public": true- }+ ] }
stc8g1k17-38i-tssop20.lbr+9−3@@ -50,7 +50,7 @@ <layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/> </layers> <library>-<description></description>+<description>STC Micro Microcontrollers (MCU/MPU/SOC), TSSOP-20</description> <packages> <package name="TSSOP-20_4.4x6.5mm_P0.65mm"> <description>TSSOP-20, 4.4 x 6.5 mm, 0.65 mm pitch</description>@@ -94,6 +94,7 @@ </packages> <symbols> <symbol name="STC8G1K17-38I-TSSOP20">+ <description>STC Micro Microcontrollers (MCU/MPU/SOC), TSSOP-20</description> <wire x1="-12.7" y1="12.7" x2="12.7" y2="12.7" width="0.254" layer="94"/> <wire x1="12.7" y1="12.7" x2="12.7" y2="-15.24" width="0.254" layer="94"/> <wire x1="12.7" y1="-15.24" x2="-12.7" y2="-15.24" width="0.254" layer="94"/>@@ -124,7 +125,7 @@ </symbols> <devicesets> <deviceset name="STC8G1K17-38I-TSSOP20" prefix="U">- <description></description>+ <description>STC Micro Microcontrollers (MCU/MPU/SOC), TSSOP-20</description> <gates> <gate name="G$1" symbol="STC8G1K17-38I-TSSOP20" x="0" y="0"/> </gates>@@ -152,7 +153,12 @@ <connect gate="G$1" pin="P3.1/TxD/ADC9" pad="12"/> <connect gate="G$1" pin="P3.0/RxD/INT4/ADC8" pad="11"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="STC8G1K17-38I-TSSOP20" constant="no"/>+ <attribute name="MANUFACTURER" value="STC Micro" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>