component
STC8G1K08-38I-TSSOP20
Public Made by Adomby adom
STC Micro Microcontrollers (MCU/MPU/SOC), TSSOP-20. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
orderable attributes: rebuild .lbr with adom-lbr 2.18.0 so MPN, MANUFACTURER and the distributor part numbers reach <technology> (LCSC_PN C521757). The published library carried no attributes at all, so a BOM had nothing to buy from. Distributor PNs matched on exact MPN AND corroborating manufacturer.
2 files changed
+25−5
page.json+5−3@@ -26,7 +26,9 @@ "model_3d_step": "stc8g1k08-38i-tssop20.step", "lbr": "stc8g1k08-38i-tssop20.lbr" },- "distributor_links": {},+ "distributor_links": {+ "lcsc": "C521757"+ }, "pins": [ { "number": "1",@@ -68,13 +70,13 @@ "number": "7", "name": "P5.4/NRST/MCLKO", "type": "bidirectional",- "description": "General-purpose I/O P5.4. Alt-functions: active-low external reset input (NRST, low-level reset) when configured as reset pin, or master-clock divider output (MCLKO). When used as reset, the internal ~4 kΩ pull-up stays on; when used as I/O, that pull-up still enables for ~6.5 ms on power-up before auto-disable."+ "description": "General-purpose I/O P5.4. Alt-functions: active-low external reset input (NRST, low-level reset) when configured as reset pin, or master-clock divider output (MCLKO). When used as reset, the internal ~4 k\u03a9 pull-up stays on; when used as I/O, that pull-up still enables for ~6.5 ms on power-up before auto-disable." }, { "number": "8", "name": "Vcc/AVcc/ADC_VRef+", "type": "power_in",- "description": "Combined chip power supply (Vcc), analog ADC supply (AVcc) and ADC positive reference (ADC_VRef+). Operating supply 2.7-5.5 V typical for the STC8G family; this -38I variant is characterised over the 3.8-5.5 V industrial range. ADC_VRef+ must be tied to an external reference between 2.4 V and Vcc (floating causes leakage). Decouple with 10 µF bulk + 0.1 µF close to the pin."+ "description": "Combined chip power supply (Vcc), analog ADC supply (AVcc) and ADC positive reference (ADC_VRef+). Operating supply 2.7-5.5 V typical for the STC8G family; this -38I variant is characterised over the 3.8-5.5 V industrial range. ADC_VRef+ must be tied to an external reference between 2.4 V and Vcc (floating causes leakage). Decouple with 10 \u00b5F bulk + 0.1 \u00b5F close to the pin." }, { "number": "9",
stc8g1k08-38i-tssop20.lbr+20−2@@ -74,11 +74,23 @@ <smd name="18" x="2.8625" y="1.6250" dx="1.4750" dy="0.4000" layer="1"/> <smd name="19" x="2.8625" y="2.2750" dx="1.4750" dy="0.4000" layer="1"/> <smd name="20" x="2.8625" y="2.9250" dx="1.4750" dy="0.4000" layer="1"/>+ <polygon width="0.1200" layer="21">+ <vertex x="-3.8600" y="2.9300"/>+ <vertex x="-4.1900" y="2.6900"/>+ <vertex x="-4.1900" y="3.1700"/>+ </polygon>+ <polygon width="0.1000" layer="51">+ <vertex x="-1.2000" y="3.2500"/>+ <vertex x="2.2000" y="3.2500"/>+ <vertex x="2.2000" y="-3.2500"/>+ <vertex x="-2.2000" y="-3.2500"/>+ <vertex x="-2.2000" y="2.2500"/>+ </polygon> <wire x1="-2.3100" y1="3.3850" x2="2.3100" y2="3.3850" width="0.1200" layer="21"/> <wire x1="2.3100" y1="-3.3850" x2="-2.3100" y2="-3.3850" width="0.1200" layer="21"/> <text x="0" y="4.262" size="1.27" layer="25" align="bottom-center">>NAME</text> <text x="0" y="-4.262" size="1.27" layer="27" align="top-center">>VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-3.8600" y="2.9300"/><vertex x="-4.1900" y="2.6900"/><vertex x="-4.1900" y="3.1700"/></polygon></package>+</package> </packages> <symbols> <symbol name="STC8G1K08-38I-TSSOP20">@@ -140,7 +152,13 @@ <connect gate="G$1" pin="P3.1/TxD/ADC9" pad="12"/> <connect gate="G$1" pin="P3.0/RxD/ADC8/INT4" pad="11"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="STC8G1K08-38I-TSSOP20" constant="no"/>+ <attribute name="MANUFACTURER" value="STC Micro" constant="no"/>+ <attribute name="LCSC_PN" value="C521757" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>