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STC89C52RC-40I-PDIP40
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STC Micro Microcontrollers (MCU/MPU/SOC), DIP-40. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+308−8@@ -1,13 +1,318 @@ {+ "schema_version": 1,+ "type": "component", "slug": "stc89c52rc-40i-pdip40",+ "title": "STC89C52RC-40I-PDIP40",+ "brief": "STC Micro Microcontrollers (MCU/MPU/SOC), DIP-40. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "STC Micro Microcontrollers (MCU/MPU/SOC), DIP-40. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "mcu", "stc89c52rc-40i-pdip40" ],+ "component": {+ "mpn": "STC89C52RC-40I-PDIP40",+ "manufacturer": "STC Micro",+ "package": "DIP-40",+ "pin_count": 40,+ "category": "MCU",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/5a17a78212f2e06d8b3a80c8c6ebc011.pdf",+ "parts": {+ "symbol": "stc89c52rc-40i-pdip40.kicad_sym",+ "footprint": "stc89c52rc-40i-pdip40.kicad_mod",+ "model_3d": "stc89c52rc-40i-pdip40.glb",+ "model_3d_step": "stc89c52rc-40i-pdip40.step",+ "lbr": "stc89c52rc-40i-pdip40.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "P1.0/T2",+ "type": "bidirectional",+ "description": "Port 1 bit 0 quasi-bidirectional I/O with internal pull-up. Alt: T2 external input for Timer/Counter 2."+ },+ {+ "number": "2",+ "name": "P1.1/T2EX",+ "type": "bidirectional",+ "description": "Port 1 bit 1 quasi-bidirectional I/O with internal pull-up. Alt: T2EX trigger for Timer/Counter 2 capture/reload."+ },+ {+ "number": "3",+ "name": "P1.2",+ "type": "bidirectional",+ "description": "Port 1 bit 2 quasi-bidirectional I/O with internal pull-up."+ },+ {+ "number": "4",+ "name": "P1.3",+ "type": "bidirectional",+ "description": "Port 1 bit 3 quasi-bidirectional I/O with internal pull-up."+ },+ {+ "number": "5",+ "name": "P1.4",+ "type": "bidirectional",+ "description": "Port 1 bit 4 quasi-bidirectional I/O with internal pull-up."+ },+ {+ "number": "6",+ "name": "P1.5",+ "type": "bidirectional",+ "description": "Port 1 bit 5 quasi-bidirectional I/O with internal pull-up."+ },+ {+ "number": "7",+ "name": "P1.6",+ "type": "bidirectional",+ "description": "Port 1 bit 6 quasi-bidirectional I/O with internal pull-up. Optional external crystal connection point on some board designs."+ },+ {+ "number": "8",+ "name": "P1.7",+ "type": "bidirectional",+ "description": "Port 1 bit 7 quasi-bidirectional I/O with internal pull-up. Optional external crystal connection point on some board designs."+ },+ {+ "number": "9",+ "name": "RST",+ "type": "input",+ "description": "Reset input. Active-high reset. RC/RD+ HD-version parts include an internal 45 k\u03a9-100 k\u03a9 pull-down on this pin; an external RC network (10 uF + 10 k\u03a9) may also be used."+ },+ {+ "number": "10",+ "name": "P3.0/RxD",+ "type": "bidirectional",+ "description": "Port 3 bit 0 quasi-bidirectional I/O with internal pull-up. Alt: UART1 serial data receive input (RxD)."+ },+ {+ "number": "11",+ "name": "P3.1/TxD",+ "type": "bidirectional",+ "description": "Port 3 bit 1 quasi-bidirectional I/O with internal pull-up. Alt: UART1 serial data transmit output (TxD)."+ },+ {+ "number": "12",+ "name": "P3.2/INT0",+ "type": "bidirectional",+ "description": "Port 3 bit 2 quasi-bidirectional I/O with internal pull-up. Alt: INT0 external interrupt 0 (falling-edge or low-level triggered)."+ },+ {+ "number": "13",+ "name": "P3.3/INT1",+ "type": "bidirectional",+ "description": "Port 3 bit 3 quasi-bidirectional I/O with internal pull-up. Alt: INT1 external interrupt 1 (falling-edge or low-level triggered)."+ },+ {+ "number": "14",+ "name": "P3.4/T0",+ "type": "bidirectional",+ "description": "Port 3 bit 4 quasi-bidirectional I/O with internal pull-up. Alt: T0 external clock input for Timer/Counter 0."+ },+ {+ "number": "15",+ "name": "P3.5/T1",+ "type": "bidirectional",+ "description": "Port 3 bit 5 quasi-bidirectional I/O with internal pull-up. Alt: T1 external clock input for Timer/Counter 1."+ },+ {+ "number": "16",+ "name": "P3.6/WR",+ "type": "bidirectional",+ "description": "Port 3 bit 6 quasi-bidirectional I/O with internal pull-up. Alt: /WR external data memory write strobe (active-low) for MOVX access to external XRAM."+ },+ {+ "number": "17",+ "name": "P3.7/RD",+ "type": "bidirectional",+ "description": "Port 3 bit 7 quasi-bidirectional I/O with internal pull-up. Alt: /RD external data memory read strobe (active-low) for MOVX access to external XRAM."+ },+ {+ "number": "18",+ "name": "XTAL2",+ "type": "output",+ "description": "On-chip clock oscillator inverting amplifier output. Connect to one lead of the external crystal. If an external clock source drives XTAL1 directly, XTAL2 may be left floating or used as a buffered clock output."+ },+ {+ "number": "19",+ "name": "XTAL1",+ "type": "input",+ "description": "On-chip clock oscillator inverting amplifier input. Connect to one lead of the external crystal (typ. 4 MHz-48 MHz). Also serves as the external clock source input."+ },+ {+ "number": "20",+ "name": "GND",+ "type": "power_in",+ "description": "Ground / 0 V power supply return."+ },+ {+ "number": "21",+ "name": "P2.0/A8",+ "type": "bidirectional",+ "description": "Port 2 bit 0 quasi-bidirectional I/O with internal pull-up. Alt: A8 high-order address bus bit when accessing external memory."+ },+ {+ "number": "22",+ "name": "P2.1/A9",+ "type": "bidirectional",+ "description": "Port 2 bit 1 quasi-bidirectional I/O with internal pull-up. Alt: A9 high-order address bus bit when accessing external memory."+ },+ {+ "number": "23",+ "name": "P2.2/A10",+ "type": "bidirectional",+ "description": "Port 2 bit 2 quasi-bidirectional I/O with internal pull-up. Alt: A10 high-order address bus bit when accessing external memory."+ },+ {+ "number": "24",+ "name": "P2.3/A11",+ "type": "bidirectional",+ "description": "Port 2 bit 3 quasi-bidirectional I/O with internal pull-up. Alt: A11 high-order address bus bit when accessing external memory."+ },+ {+ "number": "25",+ "name": "P2.4/A12",+ "type": "bidirectional",+ "description": "Port 2 bit 4 quasi-bidirectional I/O with internal pull-up. Alt: A12 high-order address bus bit when accessing external memory."+ },+ {+ "number": "26",+ "name": "P2.5/A13",+ "type": "bidirectional",+ "description": "Port 2 bit 5 quasi-bidirectional I/O with internal pull-up. Alt: A13 high-order address bus bit when accessing external memory."+ },+ {+ "number": "27",+ "name": "P2.6/A14",+ "type": "bidirectional",+ "description": "Port 2 bit 6 quasi-bidirectional I/O with internal pull-up. Alt: A14 high-order address bus bit when accessing external memory."+ },+ {+ "number": "28",+ "name": "P2.7/A15",+ "type": "bidirectional",+ "description": "Port 2 bit 7 quasi-bidirectional I/O with internal pull-up. Alt: A15 high-order address bus bit when accessing external memory."+ },+ {+ "number": "29",+ "name": "P4.4/PSEN",+ "type": "bidirectional",+ "description": "HD-version: /PSEN external program-memory strobe output (active-low). 90C-version: P4.4 general-purpose quasi-bidirectional I/O."+ },+ {+ "number": "30",+ "name": "P4.5/ALE",+ "type": "bidirectional",+ "description": "Address-latch-enable output that strobes the low byte of address during external memory access; also serves as the programming pulse input during ISP. On the 90C version this pin can be reconfigured as GPIO P4.5."+ },+ {+ "number": "31",+ "name": "P4.6/EA",+ "type": "bidirectional",+ "description": "HD-version: /EA external access enable input; tie low to force execution from external program memory, high (or leave with internal pull-up) to execute from internal Flash. 90C-version: P4.6 general-purpose quasi-bidirectional I/O."+ },+ {+ "number": "32",+ "name": "P0.7/AD7",+ "type": "bidirectional",+ "description": "Port 0 bit 7 8-bit quasi-bidirectional I/O; open-drain after power-on reset, so an external 4.7 k\u03a9-10 k\u03a9 pull-up is required when used as GPIO. Alt: AD7 multiplexed low-byte address/data bit 7 during external memory access (no external pull-up needed in this mode)."+ },+ {+ "number": "33",+ "name": "P0.6/AD6",+ "type": "bidirectional",+ "description": "Port 0 bit 6 8-bit quasi-bidirectional I/O; open-drain after power-on reset (external 4.7 k\u03a9-10 k\u03a9 pull-up required for I/O use). Alt: AD6 multiplexed low-byte address/data bit 6."+ },+ {+ "number": "34",+ "name": "P0.5/AD5",+ "type": "bidirectional",+ "description": "Port 0 bit 5 8-bit quasi-bidirectional I/O; open-drain after power-on reset (external 4.7 k\u03a9-10 k\u03a9 pull-up required for I/O use). Alt: AD5 multiplexed low-byte address/data bit 5."+ },+ {+ "number": "35",+ "name": "P0.4/AD4",+ "type": "bidirectional",+ "description": "Port 0 bit 4 8-bit quasi-bidirectional I/O; open-drain after power-on reset (external 4.7 k\u03a9-10 k\u03a9 pull-up required for I/O use). Alt: AD4 multiplexed low-byte address/data bit 4."+ },+ {+ "number": "36",+ "name": "P0.3/AD3",+ "type": "bidirectional",+ "description": "Port 0 bit 3 8-bit quasi-bidirectional I/O; open-drain after power-on reset (external 4.7 k\u03a9-10 k\u03a9 pull-up required for I/O use). Alt: AD3 multiplexed low-byte address/data bit 3."+ },+ {+ "number": "37",+ "name": "P0.2/AD2",+ "type": "bidirectional",+ "description": "Port 0 bit 2 8-bit quasi-bidirectional I/O; open-drain after power-on reset (external 4.7 k\u03a9-10 k\u03a9 pull-up required for I/O use). Alt: AD2 multiplexed low-byte address/data bit 2."+ },+ {+ "number": "38",+ "name": "P0.1/AD1",+ "type": "bidirectional",+ "description": "Port 0 bit 1 8-bit quasi-bidirectional I/O; open-drain after power-on reset (external 4.7 k\u03a9-10 k\u03a9 pull-up required for I/O use). Alt: AD1 multiplexed low-byte address/data bit 1."+ },+ {+ "number": "39",+ "name": "P0.0/AD0",+ "type": "bidirectional",+ "description": "Port 0 bit 0 8-bit quasi-bidirectional I/O; open-drain after power-on reset (external 4.7 k\u03a9-10 k\u03a9 pull-up required for I/O use). Alt: AD0 multiplexed low-byte address/data bit 0."+ },+ {+ "number": "40",+ "name": "VCC",+ "type": "power_in",+ "description": "Positive supply voltage. 5.0 V parts operate 2 MHz-48 MHz; 3.3 V parts operate 2 MHz-48 MHz (12T) / 2 MHz-32 MHz (6T). Decouple with \u226510 uF bulk plus 0.1 uF ceramic near the pin."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://datasheet.lcsc.com/datasheet/pdf/5a17a78212f2e06d8b3a80c8c6ebc011.pdf",+ "pages": 1691,+ "sha256": "fac7be430b93e2dd",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 40,+ "described": 40,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "STC Micro",+ "Package": "DIP-40",+ "Category": "MCU",+ "Pins": "40"+ }+ },+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "stc89c52rc-40i-pdip40"+ ],+ "discovery_pitch": "STC89C52RC-40I-PDIP40 (STC Micro) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +330,5 @@ "docs/stc89c52rc-40i-pdip40-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }