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STC89C52RC-40I-PDIP40
Public Made by Adomby adom
STC Micro Microcontrollers (MCU/MPU/SOC), DIP-40. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+14−11@@ -80,7 +80,7 @@ "number": "9", "name": "RST", "type": "input",- "description": "Reset input. Active-high reset. RC/RD+ HD-version parts include an internal 45 k\u03a9-100 k\u03a9 pull-down on this pin; an external RC network (10 uF + 10 k\u03a9) may also be used."+ "description": "Reset input. Active-high reset. RC/RD+ HD-version parts include an internal 45 kΩ-100 kΩ pull-down on this pin; an external RC network (10 uF + 10 kΩ) may also be used." }, { "number": "10",@@ -218,55 +218,55 @@ "number": "32", "name": "P0.7/AD7", "type": "bidirectional",- "description": "Port 0 bit 7 8-bit quasi-bidirectional I/O; open-drain after power-on reset, so an external 4.7 k\u03a9-10 k\u03a9 pull-up is required when used as GPIO. Alt: AD7 multiplexed low-byte address/data bit 7 during external memory access (no external pull-up needed in this mode)."+ "description": "Port 0 bit 7 8-bit quasi-bidirectional I/O; open-drain after power-on reset, so an external 4.7 kΩ-10 kΩ pull-up is required when used as GPIO. Alt: AD7 multiplexed low-byte address/data bit 7 during external memory access (no external pull-up needed in this mode)." }, { "number": "33", "name": "P0.6/AD6", "type": "bidirectional",- "description": "Port 0 bit 6 8-bit quasi-bidirectional I/O; open-drain after power-on reset (external 4.7 k\u03a9-10 k\u03a9 pull-up required for I/O use). Alt: AD6 multiplexed low-byte address/data bit 6."+ "description": "Port 0 bit 6 8-bit quasi-bidirectional I/O; open-drain after power-on reset (external 4.7 kΩ-10 kΩ pull-up required for I/O use). Alt: AD6 multiplexed low-byte address/data bit 6." }, { "number": "34", "name": "P0.5/AD5", "type": "bidirectional",- "description": "Port 0 bit 5 8-bit quasi-bidirectional I/O; open-drain after power-on reset (external 4.7 k\u03a9-10 k\u03a9 pull-up required for I/O use). Alt: AD5 multiplexed low-byte address/data bit 5."+ "description": "Port 0 bit 5 8-bit quasi-bidirectional I/O; open-drain after power-on reset (external 4.7 kΩ-10 kΩ pull-up required for I/O use). Alt: AD5 multiplexed low-byte address/data bit 5." }, { "number": "35", "name": "P0.4/AD4", "type": "bidirectional",- "description": "Port 0 bit 4 8-bit quasi-bidirectional I/O; open-drain after power-on reset (external 4.7 k\u03a9-10 k\u03a9 pull-up required for I/O use). Alt: AD4 multiplexed low-byte address/data bit 4."+ "description": "Port 0 bit 4 8-bit quasi-bidirectional I/O; open-drain after power-on reset (external 4.7 kΩ-10 kΩ pull-up required for I/O use). Alt: AD4 multiplexed low-byte address/data bit 4." }, { "number": "36", "name": "P0.3/AD3", "type": "bidirectional",- "description": "Port 0 bit 3 8-bit quasi-bidirectional I/O; open-drain after power-on reset (external 4.7 k\u03a9-10 k\u03a9 pull-up required for I/O use). Alt: AD3 multiplexed low-byte address/data bit 3."+ "description": "Port 0 bit 3 8-bit quasi-bidirectional I/O; open-drain after power-on reset (external 4.7 kΩ-10 kΩ pull-up required for I/O use). Alt: AD3 multiplexed low-byte address/data bit 3." }, { "number": "37", "name": "P0.2/AD2", "type": "bidirectional",- "description": "Port 0 bit 2 8-bit quasi-bidirectional I/O; open-drain after power-on reset (external 4.7 k\u03a9-10 k\u03a9 pull-up required for I/O use). Alt: AD2 multiplexed low-byte address/data bit 2."+ "description": "Port 0 bit 2 8-bit quasi-bidirectional I/O; open-drain after power-on reset (external 4.7 kΩ-10 kΩ pull-up required for I/O use). Alt: AD2 multiplexed low-byte address/data bit 2." }, { "number": "38", "name": "P0.1/AD1", "type": "bidirectional",- "description": "Port 0 bit 1 8-bit quasi-bidirectional I/O; open-drain after power-on reset (external 4.7 k\u03a9-10 k\u03a9 pull-up required for I/O use). Alt: AD1 multiplexed low-byte address/data bit 1."+ "description": "Port 0 bit 1 8-bit quasi-bidirectional I/O; open-drain after power-on reset (external 4.7 kΩ-10 kΩ pull-up required for I/O use). Alt: AD1 multiplexed low-byte address/data bit 1." }, { "number": "39", "name": "P0.0/AD0", "type": "bidirectional",- "description": "Port 0 bit 0 8-bit quasi-bidirectional I/O; open-drain after power-on reset (external 4.7 k\u03a9-10 k\u03a9 pull-up required for I/O use). Alt: AD0 multiplexed low-byte address/data bit 0."+ "description": "Port 0 bit 0 8-bit quasi-bidirectional I/O; open-drain after power-on reset (external 4.7 kΩ-10 kΩ pull-up required for I/O use). Alt: AD0 multiplexed low-byte address/data bit 0." }, { "number": "40", "name": "VCC", "type": "power_in",- "description": "Positive supply voltage. 5.0 V parts operate 2 MHz-48 MHz; 3.3 V parts operate 2 MHz-48 MHz (12T) / 2 MHz-32 MHz (6T). Decouple with \u226510 uF bulk plus 0.1 uF ceramic near the pin."+ "description": "Positive supply voltage. 5.0 V parts operate 2 MHz-48 MHz; 3.3 V parts operate 2 MHz-48 MHz (12T) / 2 MHz-32 MHz (6T). Decouple with ≥10 uF bulk plus 0.1 uF ceramic near the pin." } ], "provenance": {@@ -330,5 +330,8 @@ "docs/stc89c52rc-40i-pdip40-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ]+ ],+ "visibility": {+ "public": true+ } }