SSD1963QL9

@@ -0,0 +1,169 @@+# SSD1963QL9++**Solomon Systech** · LCD Drivers · LQFP-128(14x14)++SSD1963QL9 from Solomon Systech, in a LQFP-128(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VDDD | power_in | Digital core supply, 1.2V ±0.1V. |+| 2 | VSS | power_in | Digital ground. |+| 3 | VSS | power_in | Digital ground. |+| 4 | VDDIO | power_in | Digital I/O supply, 1.65V to 3.6V; reference for MCU-side signals. |+| 5 | VSS | power_in | Digital ground. |+| 6 | VDDD | power_in | Digital core supply, 1.2V ±0.1V. |+| 7 | D0 | bidirectional | MCU parallel data bus bit 0 (VDDIO level). Used for register access and pixel data. |+| 8 | D1 | bidirectional | MCU parallel data bus bit 1 (VDDIO level). |+| 9 | D2 | bidirectional | MCU parallel data bus bit 2 (VDDIO level). |+| 10 | D3 | bidirectional | MCU parallel data bus bit 3 (VDDIO level). |+| 11 | D4 | bidirectional | MCU parallel data bus bit 4 (VDDIO level). |+| 12 | VDDIO | power_in | Digital I/O supply, 1.65V to 3.6V. |+| 13 | VSS | power_in | Digital ground. |+| 14 | VDDD | power_in | Digital core supply, 1.2V ±0.1V. |+| 15 | CLK | input | TTL clock input (VDDIO level). Tie to VSS if the TTL clock input is not used. |+| 16 | VDDIO | power_in | Digital I/O supply, 1.65V to 3.6V. |+| 17 | VSS | power_in | Digital ground. |+| 18 | VDDPLL | power_in | Analog PLL core supply, 1.2V ±0.1V. Powers internal analog PLL and analog I/O pads. |+| 19 | VSSPLL | power_in | Analog PLL ground for the internal analog circuit and analog I/O pads. |+| 20 | VSS | power_in | Digital ground. |+| 21 | VDDD | power_in | Digital core supply, 1.2V ±0.1V. |+| 22 | XTAL_IN | input | Crystal oscillator input. Tie to VSS if not used. |+| 23 | VSS | power_in | Digital ground. |+| 24 | XTAL_OUT | output | Crystal oscillator output. Leave floating if not used. |+| 25 | VDDD | power_in | Digital core supply, 1.2V ±0.1V. |+| 26 | VSS | power_in | Digital ground. |+| 27 | VDDLCD | power_in | LCD interface supply, 1.65V to 3.6V; reference for LCD-side pads. |+| 28 | LDATA23 | output | RGB parallel LCD data bit 23 (VDDLCD level). In 24-bit mode carries R7; in 18-bit/8-bit-serial modes drive 0. |+| 29 | LDATA22 | output | RGB parallel LCD data bit 22 (VDDLCD level). 24-bit: R6. |+| 30 | LDATA21 | output | RGB parallel LCD data bit 21 (VDDLCD level). 24-bit: R5. |+| 31 | LDATA20 | output | RGB parallel LCD data bit 20 (VDDLCD level). 24-bit: R4. |+| 32 | VDDD | power_in | Digital core supply, 1.2V ±0.1V. |+| 33 | VSS | power_in | Digital ground. |+| 34 | VDDLCD | power_in | LCD interface supply, 1.65V to 3.6V. |+| 35 | LDATA17 | output | RGB parallel LCD data bit 17 (VDDLCD level). 24-bit: R1; 18-bit: R5. |+| 36 | GPIO0 | bidirectional | General purpose I/O 0 (VDDLCD level). Configurable for display miscellaneous signals or as GPIO. Default is input. |+| 37 | GPIO1 | bidirectional | General purpose I/O 1 (VDDLCD level). Default input. |+| 38 | GPIO2 | bidirectional | General purpose I/O 2 (VDDLCD level). Default input. |+| 39 | GPIO3 | bidirectional | General purpose I/O 3 (VDDLCD level). Default input. |+| 40 | VDDD | power_in | Digital core supply, 1.2V ±0.1V. |+| 41 | VSS | power_in | Digital ground. |+| 42 | VDDLCD | power_in | LCD interface supply, 1.65V to 3.6V. |+| 43 | LFRAME | output | Vertical sync / frame pulse (FRAME) for the LCD panel (VDDLCD level). |+| 44 | LLINE | output | Horizontal sync / line pulse (LINE) for the LCD panel (VDDLCD level). |+| 45 | LSHIFT | output | Pixel clock / pixel shift signal (SHIFT) for the LCD panel (VDDLCD level). |+| 46 | VDDD | power_in | Digital core supply, 1.2V ±0.1V. |+| 47 | VSS | power_in | Digital ground. |+| 48 | VDDLCD | power_in | LCD interface supply, 1.65V to 3.6V. |+| 49 | LDEN | output | Data valid / data enable (DEN) for the LCD panel (VDDLCD level). |+| 50 | TE | output | Tearing-effect signal (VDDLCD level). Indicates the panel's non-display period so the host can synchronize screen updates. |+| 51 | PWM | output | PWM output for backlight driver, also used by the Dynamic Backlight Control (DBC) engine (VDDLCD level). |+| 52 | GAMAS0 | output | Gamma selection bit 0 for the panel (VDDLCD level). |+| 53 | GAMAS1 | output | Gamma selection bit 1 for the panel (VDDLCD level). |+| 54 | VDDLCD | power_in | LCD interface supply, 1.65V to 3.6V. |+| 55 | VSS | power_in | Digital ground. |+| 56 | VDDD | power_in | Digital core supply, 1.2V ±0.1V. |+| 57 | VSS | power_in | Digital ground. |+| 58 | VDDLCD | power_in | LCD interface supply, 1.65V to 3.6V. |+| 59 | LDATA16 | output | RGB parallel LCD data bit 16 (VDDLCD level). 24-bit: R0; 18-bit: R4. |+| 60 | LDATA15 | output | RGB parallel LCD data bit 15 (VDDLCD level). 24-bit: G7; 18-bit: R3. |+| 61 | LDATA14 | output | RGB parallel LCD data bit 14 (VDDLCD level). 24-bit: G6; 18-bit: R2. |+| 62 | LDATA13 | output | RGB parallel LCD data bit 13 (VDDLCD level). 24-bit: G5; 18-bit: R1. |+| 63 | LDATA12 | output | RGB parallel LCD data bit 12 (VDDLCD level). 24-bit: G4; 18-bit: R0. |+| 64 | VDDD | power_in | Digital core supply, 1.2V ±0.1V. |+| 65 | VSS | power_in | Digital ground. |+| 66 | VDDLCD | power_in | LCD interface supply, 1.65V to 3.6V. |+| 67 | LDATA11 | output | RGB parallel LCD data bit 11 (VDDLCD level). 24-bit: G3; 18-bit: G5. |+| 68 | LDATA10 | output | RGB parallel LCD data bit 10 (VDDLCD level). 24-bit: G2; 18-bit: G4. |+| 69 | LDATA9 | output | RGB parallel LCD data bit 9 (VDDLCD level). 24-bit: G1; 18-bit: G3. |+| 70 | LDATA8 | output | RGB parallel LCD data bit 8 (VDDLCD level). 24-bit: G0; 18-bit: G2. |+| 71 | LDATA7 | output | RGB parallel LCD data bit 7 (VDDLCD level). 24-bit: B7; 18-bit: G1; 8-bit serial: D7. |+| 72 | LDATA6 | output | RGB parallel LCD data bit 6 (VDDLCD level). 24-bit: B6; 18-bit: G0; 8-bit serial: D6. |+| 73 | VDDD | power_in | Digital core supply, 1.2V ±0.1V. |+| 74 | VSS | power_in | Digital ground. |+| 75 | VDDLCD | power_in | LCD interface supply, 1.65V to 3.6V. |+| 76 | LDATA5 | output | RGB parallel LCD data bit 5 (VDDLCD level). 24-bit: B5; 18-bit: B5; 8-bit serial: D5. |+| 77 | LDATA4 | output | RGB parallel LCD data bit 4 (VDDLCD level). 24-bit: B4; 18-bit: B4; 8-bit serial: D4. |+| 78 | LDATA3 | output | RGB parallel LCD data bit 3 (VDDLCD level). 24-bit: B3; 18-bit: B3; 8-bit serial: D3. |+| 79 | LDATA2 | output | RGB parallel LCD data bit 2 (VDDLCD level). 24-bit: B2; 18-bit: B2; 8-bit serial: D2. |+| 80 | LDATA1 | output | RGB parallel LCD data bit 1 (VDDLCD level). 24-bit: B1; 18-bit: B1; 8-bit serial: D1. |+| 81 | LDATA0 | output | RGB parallel LCD data bit 0 (VDDLCD level). 24-bit: B0; 18-bit: B0; 8-bit serial: D0. |+| 82 | VDDD | power_in | Digital core supply, 1.2V ±0.1V. |+| 83 | VSS | power_in | Digital ground. |+| 84 | VDDLCD | power_in | LCD interface supply, 1.65V to 3.6V. |+| 85 | LDATA19 | output | RGB parallel LCD data bit 19 (VDDLCD level). 24-bit: R3. |+| 86 | LDATA18 | output | RGB parallel LCD data bit 18 (VDDLCD level). 24-bit: R2. |+| 87 | D19 | bidirectional | MCU parallel data bus bit 19 (VDDIO level). Used in 24-bit MCU interface mode. |+| 88 | D18 | bidirectional | MCU parallel data bus bit 18 (VDDIO level). |+| 89 | D23 | bidirectional | MCU parallel data bus bit 23 (VDDIO level). |+| 90 | D22 | bidirectional | MCU parallel data bus bit 22 (VDDIO level). |+| 91 | D21 | bidirectional | MCU parallel data bus bit 21 (VDDIO level). |+| 92 | D20 | bidirectional | MCU parallel data bus bit 20 (VDDIO level). |+| 93 | VDDD | power_in | Digital core supply, 1.2V ±0.1V. |+| 94 | VSS | power_in | Digital ground. |+| 95 | VDDIO | power_in | Digital I/O supply, 1.65V to 3.6V. |+| 96 | VSS | power_in | Digital ground. |+| 97 | VDDIO | power_in | Digital I/O supply, 1.65V to 3.6V. |+| 98 | D17 | bidirectional | MCU parallel data bus bit 17 (VDDIO level). |+| 99 | D16 | bidirectional | MCU parallel data bus bit 16 (VDDIO level). |+| 100 | VDDIO | power_in | Digital I/O supply, 1.65V to 3.6V. |+| 101 | VSS | power_in | Digital ground. |+| 102 | VDDD | power_in | Digital core supply, 1.2V ±0.1V. |+| 103 | D15 | bidirectional | MCU parallel data bus bit 15 (VDDIO level). |+| 104 | D14 | bidirectional | MCU parallel data bus bit 14 (VDDIO level). |+| 105 | D13 | bidirectional | MCU parallel data bus bit 13 (VDDIO level). |+| 106 | D12 | bidirectional | MCU parallel data bus bit 12 (VDDIO level). |+| 107 | D11 | bidirectional | MCU parallel data bus bit 11 (VDDIO level). |+| 108 | VDDIO | power_in | Digital I/O supply, 1.65V to 3.6V. |+| 109 | VSS | power_in | Digital ground. |+| 110 | VDDD | power_in | Digital core supply, 1.2V ±0.1V. |+| 111 | D10 | bidirectional | MCU parallel data bus bit 10 (VDDIO level). |+| 112 | D9 | bidirectional | MCU parallel data bus bit 9 (VDDIO level). |+| 113 | D8 | bidirectional | MCU parallel data bus bit 8 (VDDIO level). |+| 114 | D7 | bidirectional | MCU parallel data bus bit 7 (VDDIO level). |+| 115 | D6 | bidirectional | MCU parallel data bus bit 6 (VDDIO level). |+| 116 | D5 | bidirectional | MCU parallel data bus bit 5 (VDDIO level). |+| 117 | VDDIO | power_in | Digital I/O supply, 1.65V to 3.6V. |+| 118 | VSS | power_in | Digital ground. |+| 119 | VDDD | power_in | Digital core supply, 1.2V ±0.1V. |+| 120 | R/W#(WR#) | input | 6800 mode: R/W# (0 = write cycle, 1 = read cycle). 8080 mode: WR# write strobe signal (VDDIO level). |+| 121 | E(RD#) | input | 6800 mode: E enable signal. 8080 mode: RD# read strobe signal (VDDIO level). |+| 122 | D/C# | input | Data/Command select (VDDIO level). |+| 123 | CS# | input | Chip select, active low (VDDIO level). |+| 124 | VDDIO | power_in | Digital I/O supply, 1.65V to 3.6V. |+| 125 | VSS | power_in | Digital ground. |+| 126 | VDDD | power_in | Digital core supply, 1.2V ±0.1V. |+| 127 | RESET# | input | Master synchronous reset, active low (VDDIO level). |+| 128 | CONF | input | MCU interface configuration select (VDDIO level): 0 = 6800 interface, 1 = 8080 interface. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Solomon Systech |+| Package | LQFP-128(14x14) |+| Category | LED-drv |+| Pins | 128 |++## Ordering variants++- `SSD1963QL9`+- `SSD1963QL9R`+- `SSD1963QL9G41`++## CAD (KiCad official)++- Symbol: `SSD1963QL9`+- Footprint: `Package_QFP:LQFP-128_14x14mm_P0.4mm`+- 3D model: LQFP-128(14x14) (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Solomon Systech datasheet](docs/ssd1963ql9-datasheet.pdf) (93 pp, sha256 `3b7c6f94b937ea30`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ssd1963ql9-datasheet.pdf)