component
SRK2000ATR
Public Made by Adomby adom
STMicroelectronics Supervisor And Reset ICs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+44@@ -0,0 +1,44 @@+# SRK2000ATR++**STMicroelectronics** · Supervisor And Reset ICs · SO-8++SRK2000ATR from STMicroelectronics, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | SGND | power_in | Signal ground, return of the device bias current and 0 V reference for both drain-to-source voltage monitors, to be routed directly to PGND. |+| 2 | EN | input | Sets the drain-voltage turn-off threshold (-12 mV or -25 mV), programs the gate-driver UVLO (VEN_On 1.8 V typ.), and acts as enable, with pulling it to ground disabling GD1 and GD2. |+| 3 | DVS1 | input | Drain voltage sense for section 1, connected to the SR MOSFET drain through a limiting resistor, with analog input voltage rated -0.3 V to VCCZ and sink current limited to 25 mA. |+| 4 | DVS2 | input | Drain voltage sense for section 2, connected to the SR MOSFET drain through a limiting resistor, with analog input voltage rated -0.3 V to VCCZ and sink current limited to 25 mA. |+| 5 | GD2 | output | Gate driver output for section 2, a totem-pole stage with 1 A peak source and 3.5 A peak sink current, with high level clamped at about 12 V. |+| 6 | PGND | power_in | Power ground, return for gate drive currents, to be routed to the common point where the source terminals of both SR MOSFETs connect. |+| 7 | GD1 | output | Gate driver output for section 1, a totem-pole stage with 1 A peak source and 3.5 A peak sink current, with high level clamped at about 12 V. |+| 8 | VCC | power_in | Supply voltage of the device, with a 4.5 to 32 V operating range after turn-on and absolute maximum DC supply of -0.3 V to VCCZ, bypassed to SGND with about 0.1 µF. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | SO-8 |+| Category | Power Management (PMIC) |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `SRK2000ATR`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SO-8 (KiCad packages3D, STEP)+- 3D model files: `srk2000atr-etched.step` / `srk2000atr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `srk2000atr.step` / `srk2000atr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590162534524489728) (19 pp, sha256 `b1f0f9364b7fc748`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/srk2000atr-datasheet.pdf)
page.jsonadded+200@@ -0,0 +1,200 @@+{+ "slug": "srk2000atr",+ "version": "0.1.0",+ "type": "component",+ "description": "STMicroelectronics Supervisor And Reset ICs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "srk2000atr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "srk2000atr.kicad_sym",+ "srk2000atr.kicad_mod",+ "srk2000atr.glb",+ "srk2000atr.step",+ "srk2000atr.lbr",+ "docs/hero.png",+ "docs/srk2000atr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "srk2000atr-hero.glb",+ "srk2000atr-hero.overlay.json"+ ],+ "component": {+ "mpn": "SRK2000ATR",+ "manufacturer": "STMicroelectronics",+ "package": "SO-8",+ "pin_count": 8,+ "category": "Power Management (PMIC)",+ "subcategory": "Supervisor And Reset ICs",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590162534524489728",+ "parts": {+ "symbol": "srk2000atr.kicad_sym",+ "footprint": "srk2000atr.kicad_mod",+ "model_3d": "srk2000atr-hero.glb",+ "model_3d_plain": "srk2000atr.glb",+ "model_3d_step": "srk2000atr-etched.step",+ "model_3d_step_plain": "srk2000atr.step",+ "lbr": "srk2000atr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2657876",+ "digikey": "497-15433-2-ND",+ "mouser": "511-SRK2000ATR"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T18:36:06Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-15433-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "511-SRK2000ATR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "SGND",+ "type": "power_in",+ "description": "Signal ground, return of the device bias current and 0 V reference for both drain-to-source voltage monitors, to be routed directly to PGND."+ },+ {+ "number": "2",+ "name": "EN",+ "type": "input",+ "description": "Sets the drain-voltage turn-off threshold (-12 mV or -25 mV), programs the gate-driver UVLO (VEN_On 1.8 V typ.), and acts as enable, with pulling it to ground disabling GD1 and GD2."+ },+ {+ "number": "3",+ "name": "DVS1",+ "type": "input",+ "description": "Drain voltage sense for section 1, connected to the SR MOSFET drain through a limiting resistor, with analog input voltage rated -0.3 V to VCCZ and sink current limited to 25 mA."+ },+ {+ "number": "4",+ "name": "DVS2",+ "type": "input",+ "description": "Drain voltage sense for section 2, connected to the SR MOSFET drain through a limiting resistor, with analog input voltage rated -0.3 V to VCCZ and sink current limited to 25 mA."+ },+ {+ "number": "5",+ "name": "GD2",+ "type": "output",+ "description": "Gate driver output for section 2, a totem-pole stage with 1 A peak source and 3.5 A peak sink current, with high level clamped at about 12 V."+ },+ {+ "number": "6",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground, return for gate drive currents, to be routed to the common point where the source terminals of both SR MOSFETs connect."+ },+ {+ "number": "7",+ "name": "GD1",+ "type": "output",+ "description": "Gate driver output for section 1, a totem-pole stage with 1 A peak source and 3.5 A peak sink current, with high level clamped at about 12 V."+ },+ {+ "number": "8",+ "name": "VCC",+ "type": "power_in",+ "description": "Supply voltage of the device, with a 4.5 to 32 V operating range after turn-on and absolute maximum DC supply of -0.3 V to VCCZ, bypassed to SGND with about 0.1 µF."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Table 2 lists DVS1/DVS2 on rows 3 and 4 and GD2/GD1 on rows 5 and 7 as grouped entries; the per-pin ; The datasheet covers a single SO-8 package. SRK2000ATR is the tape-and-reel packing of the same SO-8"+ ],+ "pages_sent": 19,+ "cost_usd": 0.076,+ "at": "2026-10-08T18:35:44"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590162534524489728",+ "pages": 19,+ "sha256": "b1f0f9364b7fc748",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "srk2000atr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 4.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "srk2000atr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 4.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "27e3c6484c818b0a1dfff22e38b431068de4746a09b6f98c01e4ea51adb9dfac",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}