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SN75372DR
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Texas Instruments Gate Drivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+44@@ -0,0 +1,44 @@+# SN75372DR++**Texas Instruments** · Gate Drivers · SOIC-8++SN75372DR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1A | input | NAND input A for driver 1, with VIH of 2 V minimum and VIL of 0.8 V maximum; IIL is −1.6 mA maximum at 0.4 V. |+| 2 | E | input | Enable input shown in the schematic as common to both drivers, with VIH of 2 V minimum and VIL of 0.8 V maximum; IIL is −3.2 mA maximum at 0.4 V. |+| 3 | 2A | input | NAND input A for driver 2, with VIH of 2 V minimum and VIL of 0.8 V maximum; IIL is −1.6 mA maximum at 0.4 V. |+| 4 | GND | power_in | Network ground; all datasheet voltages are referenced to network GND. |+| 5 | VCC2 | power_in | Output-stage supply, 4.75 V to 24 V recommended, with a 25 V absolute maximum. |+| 6 | 2Y | output | Totem-pole output of driver 2, with a peak output current of 500 mA (tw < 10 ms, duty cycle < 50%) and a continuous IOL of 40 mA maximum. |+| 7 | 1Y | output | Totem-pole output of driver 1, with a peak output current of 500 mA (tw < 10 ms, duty cycle < 50%) and a continuous IOL of 40 mA maximum. |+| 8 | VCC1 | power_in | 5 V logic supply, 4.75 V to 5.25 V recommended, with a 7 V absolute maximum. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-8 |+| Category | Motor Driver ICs |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `SN75372DR`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)+- 3D model files: `sn75372dr-etched.step` / `sn75372dr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn75372dr.step` / `sn75372dr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn75372.pdf) (21 pp, sha256 `b087f38ca3d2e00b`, retrieved 2026-10-08, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn75372dr-datasheet.pdf)
page.jsonadded+199@@ -0,0 +1,199 @@+{+ "slug": "sn75372dr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Gate Drivers, SOIC-8. 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Pins 1, 2, 3, 6 and 7 are; The datasheet gives no explicit pin-role table. The description for E as common to both drivers come; The 'D' SOIC package is the only 8-pin SOIC variant in this datasheet that matches SN75372DR. The PS"+ ],+ "pages_sent": 21,+ "cost_usd": 0.0755,+ "at": "2026-10-08T16:08:10"+ },+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/sn75372.pdf",+ "pages": 21,+ "sha256": "b087f38ca3d2e00b",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "sn75372dr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 4.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "sn75372dr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 4.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "0b2190edff65907e4548df8a28648b56bc57253f22ec7a0085af1d8b92ba4e12",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}