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SN74LVTH543PWR
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Texas Instruments Buffers, Drivers, Receivers, Transceivers, TSSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+60@@ -0,0 +1,60 @@+# SN74LVTH543PWR++**Texas Instruments** · Buffers, Drivers, Receivers, Transceivers · TSSOP-24++SN74LVTH543PWR from Texas Instruments, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | LEBA | input | B-to-A latch enable: with CEBA low and LEBA low the B-to-A latches are transparent, and a low-to-high transition of LEBA stores the data (datasheet, page 2). |+| 2 | OEBA | input | B-to-A output enable: with CEBA and OEBA both low the A outputs are active, and OE should be tied to VCC through a pullup resistor to keep outputs high-impedance above 1.5 V during power-up/power-down. |+| 3 | A1 | bidirectional | A-port data bit 1 of the octal transceiver; 3-state output that is driven when OEBA and CEBA are low, with bus-hold on the input and 5-V tolerant inputs with VCC at 3.3 V. |+| 4 | A2 | bidirectional | A-port data bit 2 of the octal transceiver; 3-state output that is driven when OEBA and CEBA are low, with bus-hold on the input and 5-V tolerant inputs with VCC at 3.3 V. |+| 5 | A3 | bidirectional | A-port data bit 3 of the octal transceiver; 3-state output that is driven when OEBA and CEBA are low, with bus-hold on the input and 5-V tolerant inputs with VCC at 3.3 V. |+| 6 | A4 | bidirectional | A-port data bit 4 of the octal transceiver; 3-state output that is driven when OEBA and CEBA are low, with bus-hold on the input and 5-V tolerant inputs with VCC at 3.3 V. |+| 7 | A5 | bidirectional | A-port data bit 5 of the octal transceiver; 3-state output that is driven when OEBA and CEBA are low, with bus-hold on the input and 5-V tolerant inputs with VCC at 3.3 V. |+| 8 | A6 | bidirectional | A-port data bit 6 of the octal transceiver; 3-state output that is driven when OEBA and CEBA are low, with bus-hold on the input and 5-V tolerant inputs with VCC at 3.3 V. |+| 9 | A7 | bidirectional | A-port data bit 7 of the octal transceiver; 3-state output that is driven when OEBA and CEBA are low, with bus-hold on the input and 5-V tolerant inputs with VCC at 3.3 V. |+| 10 | A8 | bidirectional | A-port data bit 8 of the octal transceiver; 3-state output that is driven when OEBA and CEBA are low, with bus-hold on the input and 5-V tolerant inputs with VCC at 3.3 V. |+| 11 | CEAB | input | A-to-B enable: must be low to enter data from A or to output data from B. |+| 12 | GND | power_in | Ground reference for the device. |+| 13 | OEAB | input | A-to-B output enable: with CEAB and OEAB both low the 3-state B outputs are active and reflect the A latch data. |+| 14 | LEAB | input | A-to-B latch enable: with CEAB and LEAB low the A-to-B latches are transparent, and a low-to-high transition of LEAB stores the data. |+| 15 | B8 | bidirectional | B-port data bit 8 of the octal transceiver; 3-state output that is driven when OEAB and CEAB are low, with bus-hold on the input and 5-V tolerant inputs with VCC at 3.3 V. |+| 16 | B7 | bidirectional | B-port data bit 7 of the octal transceiver; 3-state output that is driven when OEAB and CEAB are low, with bus-hold on the input and 5-V tolerant inputs with VCC at 3.3 V. |+| 17 | B6 | bidirectional | B-port data bit 6 of the octal transceiver; 3-state output that is driven when OEAB and CEAB are low, with bus-hold on the input and 5-V tolerant inputs with VCC at 3.3 V. |+| 18 | B5 | bidirectional | B-port data bit 5 of the octal transceiver; 3-state output that is driven when OEAB and CEAB are low, with bus-hold on the input and 5-V tolerant inputs with VCC at 3.3 V. |+| 19 | B4 | bidirectional | B-port data bit 4 of the octal transceiver; 3-state output that is driven when OEAB and CEAB are low, with bus-hold on the input and 5-V tolerant inputs with VCC at 3.3 V. |+| 20 | B3 | bidirectional | B-port data bit 3 of the octal transceiver; 3-state output that is driven when OEAB and CEAB are low, with bus-hold on the input and 5-V tolerant inputs with VCC at 3.3 V. |+| 21 | B2 | bidirectional | B-port data bit 2 of the octal transceiver; 3-state output that is driven when OEAB and CEAB are low, with bus-hold on the input and 5-V tolerant inputs with VCC at 3.3 V. |+| 22 | B1 | bidirectional | B-port data bit 1 of the octal transceiver; 3-state output that is driven when OEAB and CEAB are low, with bus-hold on the input and 5-V tolerant inputs with VCC at 3.3 V. |+| 23 | CEBA | input | B-to-A enable: must be low to enter data from B or to output data from A. |+| 24 | VCC | power_in | Supply voltage; recommended operating range is 2.7 V to 3.6 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-24 |+| Category | Logic |+| Pins | 24 |++## CAD (KiCad official)++- Symbol: `SN74LVTH543PWR`+- Footprint: `Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm`+- 3D model: TSSOP-24 (KiCad packages3D, STEP)+- 3D model files: `sn74lvth543pwr-etched.step` / `sn74lvth543pwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74lvth543pwr.step` / `sn74lvth543pwr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn74lvth543.pdf) (19 pp, sha256 `16482118de43e719`, retrieved 2026-10-07, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn74lvth543pwr-datasheet.pdf)
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Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "logic",+ "sn74lvth543pwr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "sn74lvth543pwr.kicad_sym",+ "sn74lvth543pwr.kicad_mod",+ "sn74lvth543pwr.glb",+ "sn74lvth543pwr.step",+ "sn74lvth543pwr.lbr",+ "docs/hero.png",+ "docs/sn74lvth543pwr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "sn74lvth543pwr-hero.glb",+ "sn74lvth543pwr-hero.overlay.json"+ ],+ "component": {+ "mpn": "SN74LVTH543PWR",+ "manufacturer": "Texas Instruments",+ "package": "TSSOP-24",+ "pin_count": 24,+ "category": "Logic",+ "subcategory": "Buffers, Drivers, Receivers, Transceivers",+ "datasheet": "https://www.ti.com/lit/ds/symlink/sn74lvth543.pdf",+ "parts": {+ "symbol": "sn74lvth543pwr.kicad_sym",+ "footprint": "sn74lvth543pwr.kicad_mod",+ "model_3d": "sn74lvth543pwr-hero.glb",+ "model_3d_plain": "sn74lvth543pwr.glb",+ "model_3d_step": "sn74lvth543pwr-etched.step",+ "model_3d_step_plain": "sn74lvth543pwr.step",+ "lbr": "sn74lvth543pwr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2676171",+ "digikey": "296-8732-2-ND",+ "mouser": "595-SN74LVTH543PWR"+ },+ "distributor_check": {+ "checked_at": "2026-10-07T22:31:31Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-8732-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-SN74LVTH543PWR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "LEBA",+ "type": "input",+ "description": "B-to-A latch enable: with CEBA low and LEBA low the B-to-A latches are transparent, and a low-to-high transition of LEBA stores the data (datasheet, page 2)."+ },+ {+ "number": "2",+ "name": "OEBA",+ "type": "input",+ "description": "B-to-A output enable: with CEBA and OEBA both low the A outputs are active, and OE should be tied to VCC through a pullup resistor to keep outputs high-impedance above 1.5 V during power-up/power-down."+ },+ {+ "number": "3",+ "name": "A1",+ "type": "bidirectional",+ "description": "A-port data bit 1 of the octal transceiver; 3-state output that is driven when OEBA and CEBA are low, with bus-hold on the input and 5-V tolerant inputs with VCC at 3.3 V."+ },+ {+ "number": "4",+ "name": "A2",+ "type": "bidirectional",+ "description": "A-port data bit 2 of the octal transceiver; 3-state output that is driven when OEBA and CEBA are low, with bus-hold on the input and 5-V tolerant inputs with VCC at 3.3 V."+ },+ {+ "number": "5",+ "name": "A3",+ "type": "bidirectional",+ "description": "A-port data bit 3 of the octal transceiver; 3-state output that is driven when OEBA and CEBA are low, with bus-hold on the input and 5-V tolerant inputs with VCC at 3.3 V."+ },+ {+ "number": "6",+ "name": "A4",+ "type": "bidirectional",+ "description": "A-port data bit 4 of the octal transceiver; 3-state output that is driven when OEBA and CEBA are low, with bus-hold on the input and 5-V tolerant inputs with VCC at 3.3 V."+ },+ {+ "number": "7",+ "name": "A5",+ "type": "bidirectional",+ "description": "A-port data bit 5 of the octal transceiver; 3-state output that is driven when OEBA and CEBA are low, with bus-hold on the input and 5-V tolerant inputs with VCC at 3.3 V."+ },+ {+ "number": "8",+ "name": "A6",+ "type": "bidirectional",+ "description": "A-port data bit 6 of the octal transceiver; 3-state output that is driven when OEBA and CEBA are low, with bus-hold on the input and 5-V tolerant inputs with VCC at 3.3 V."+ },+ {+ "number": "9",+ "name": "A7",+ "type": "bidirectional",+ "description": "A-port data bit 7 of the octal transceiver; 3-state output that is driven when OEBA and CEBA are low, with bus-hold on the input and 5-V tolerant inputs with VCC at 3.3 V."+ },+ {+ "number": "10",+ "name": "A8",+ "type": "bidirectional",+ "description": "A-port data bit 8 of the octal transceiver; 3-state output that is driven when OEBA and CEBA are low, with bus-hold on the input and 5-V tolerant inputs with VCC at 3.3 V."+ },+ {+ "number": "11",+ "name": "CEAB",+ "type": "input",+ "description": "A-to-B enable: must be low to enter data from A or to output data from B."+ },+ {+ "number": "12",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference for the device."+ },+ {+ "number": "13",+ "name": "OEAB",+ "type": "input",+ "description": "A-to-B output enable: with CEAB and OEAB both low the 3-state B outputs are active and reflect the A latch data."+ },+ {+ "number": "14",+ "name": "LEAB",+ "type": "input",+ "description": "A-to-B latch enable: with CEAB and LEAB low the A-to-B latches are transparent, and a low-to-high transition of LEAB stores the data."+ },+ {+ "number": "15",+ "name": "B8",+ "type": "bidirectional",+ "description": "B-port data bit 8 of the octal transceiver; 3-state output that is driven when OEAB and CEAB are low, with bus-hold on the input and 5-V tolerant inputs with VCC at 3.3 V."+ },+ {+ "number": "16",+ "name": "B7",+ "type": "bidirectional",+ "description": "B-port data bit 7 of the octal transceiver; 3-state output that is driven when OEAB and CEAB are low, with bus-hold on the input and 5-V tolerant inputs with VCC at 3.3 V."+ },+ {+ "number": "17",+ "name": "B6",+ "type": "bidirectional",+ "description": "B-port data bit 6 of the octal transceiver; 3-state output that is driven when OEAB and CEAB are low, with bus-hold on the input and 5-V tolerant inputs with VCC at 3.3 V."+ },+ {+ "number": "18",+ "name": "B5",+ "type": "bidirectional",+ "description": "B-port data bit 5 of the octal transceiver; 3-state output that is driven when OEAB and CEAB are low, with bus-hold on the input and 5-V tolerant inputs with VCC at 3.3 V."+ },+ {+ "number": "19",+ "name": "B4",+ "type": "bidirectional",+ "description": "B-port data bit 4 of the octal transceiver; 3-state output that is driven when OEAB and CEAB are low, with bus-hold on the input and 5-V tolerant inputs with VCC at 3.3 V."+ },+ {+ "number": "20",+ "name": "B3",+ "type": "bidirectional",+ "description": "B-port data bit 3 of the octal transceiver; 3-state output that is driven when OEAB and CEAB are low, with bus-hold on the input and 5-V tolerant inputs with VCC at 3.3 V."+ },+ {+ "number": "21",+ "name": "B2",+ "type": "bidirectional",+ "description": "B-port data bit 2 of the octal transceiver; 3-state output that is driven when OEAB and CEAB are low, with bus-hold on the input and 5-V tolerant inputs with VCC at 3.3 V."+ },+ {+ "number": "22",+ "name": "B1",+ "type": "bidirectional",+ "description": "B-port data bit 1 of the octal transceiver; 3-state output that is driven when OEAB and CEAB are low, with bus-hold on the input and 5-V tolerant inputs with VCC at 3.3 V."+ },+ {+ "number": "23",+ "name": "CEBA",+ "type": "input",+ "description": "B-to-A enable: must be low to enter data from B or to output data from A."+ },+ {+ "number": "24",+ "name": "VCC",+ "type": "power_in",+ "description": "Supply voltage; recommended operating range is 2.7 V to 3.6 V."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The TOP VIEW text extraction is garbled for the right-hand column. Pin numbers for OEAB (13), LEAB (; Per-bit A and B descriptions are generic because the datasheet gives the same 3-state/bus-hold behav; The datasheet gives a shared pinout for the DB, DGV, DW, NS, and PW packages. Only the PW (TSSOP-24)"+ ],+ "pages_sent": 19,+ "cost_usd": 0.0928,+ "at": "2026-10-07T22:31:10"+ },+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/sn74lvth543.pdf",+ "pages": 19,+ "sha256": "16482118de43e719",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 24,+ "described": 24,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "sn74lvth543pwr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 7.8,+ 0.97+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "706322f42d9793ebf28d5b80100a68bfa8769998a00b78acadf7af937fc1454f",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "sn74lvth543pwr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 7.8,+ 0.97+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "62cc38950d4561b30d954c5c47e222a260bd663d4484a53d548c7ce93c65aaaa",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}