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Initial commit: component/sn74lvth245apwr

Ray ·ae96f652fd ·
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README.mdadded+86
@@ -0,0 +1,86 @@+# SN74LVTH245APWR++**Texas Instruments** · Buffer/Driver/Transceiver · TSSOP-20++SN74LVTH245APWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | DIR | input | Direction control. When DIR=L, data flows from B to A; when DIR=H, data flows from A to B. TTL-compatible input, VIH ≥ 2 V, VIL ≤ 0.8 V. |+| 2 | A1 | bidirectional | Channel-1 A-side bus port. Input or 3-state output depending on DIR and /OE. Includes active bus-hold circuitry to hold unused inputs at a valid logic level. |+| 3 | A2 | bidirectional | Channel-2 A-side bus port. Input or 3-state output depending on DIR and /OE. Includes bus-hold. |+| 4 | A3 | bidirectional | Channel-3 A-side bus port. Input or 3-state output depending on DIR and /OE. Includes bus-hold. |+| 5 | A4 | bidirectional | Channel-4 A-side bus port. Input or 3-state output depending on DIR and /OE. Includes bus-hold. |+| 6 | A5 | bidirectional | Channel-5 A-side bus port. Input or 3-state output depending on DIR and /OE. Includes bus-hold. |+| 7 | A6 | bidirectional | Channel-6 A-side bus port. Input or 3-state output depending on DIR and /OE. Includes bus-hold. |+| 8 | A7 | bidirectional | Channel-7 A-side bus port. Input or 3-state output depending on DIR and /OE. Includes bus-hold. |+| 9 | A8 | bidirectional | Channel-8 A-side bus port. Input or 3-state output depending on DIR and /OE. Includes bus-hold. |+| 10 | GND | power_in | Device ground reference (0 V). |+| 11 | B8 | bidirectional | Channel-8 B-side bus port. Input or 3-state output depending on DIR and /OE. Includes bus-hold. |+| 12 | B7 | bidirectional | Channel-7 B-side bus port. Input or 3-state output depending on DIR and /OE. Includes bus-hold. |+| 13 | B6 | bidirectional | Channel-6 B-side bus port. Input or 3-state output depending on DIR and /OE. Includes bus-hold. |+| 14 | B5 | bidirectional | Channel-5 B-side bus port. Input or 3-state output depending on DIR and /OE. Includes bus-hold. |+| 15 | B4 | bidirectional | Channel-4 B-side bus port. Input or 3-state output depending on DIR and /OE. Includes bus-hold. |+| 16 | B3 | bidirectional | Channel-3 B-side bus port. Input or 3-state output depending on DIR and /OE. Includes bus-hold. |+| 17 | B2 | bidirectional | Channel-2 B-side bus port. Input or 3-state output depending on DIR and /OE. Includes bus-hold. |+| 18 | B1 | bidirectional | Channel-1 B-side bus port. Input or 3-state output depending on DIR and /OE. Includes bus-hold. |+| 19 | /OE | input | Active-low output enable. When /OE=L the transceiver is enabled and drives the destination bus per DIR; when /OE=H both A and B ports are in the high-impedance (isolation) state. Should be tied to VCC through a pull-up during power sequencing to guarantee Hi-Z at power-up/down. |+| 20 | VCC | power_in | 3.3-V supply input. Recommended VCC = 2.7 V to 3.6 V; absolute max 4.6 V. Bypass locally with a 0.1 µF ceramic to GND. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-20 |+| Category | Logic |+| Pins | 20 |++## Ordering variants++- `SN74LVTH245APWRAPW`+- `SN74LVTH245APWRAPWR`+- `SN74LVTH245APWRAPWE4`+- `SN74LVTH245APWRAPWG4`+- `SN74LVTH245APWRAPWRE4`+- `SN74LVTH245APWRAPWRG4`+- `SN74LVTH245APWRADBR`+- `SN74LVTH245APWRADBR.B`+- `SN74LVTH245APWRADBR1G4`+- `SN74LVTH245APWRADBR1G4.B`+- `SN74LVTH245APWRADW`+- `SN74LVTH245APWRADWR`+- `SN74LVTH245APWRADW.B`+- `SN74LVTH245APWRADWR.B`+- `SN74LVTH245APWRADWRG4`+- `SN74LVTH245APWRANSR`+- `SN74LVTH245APWRANS.B`+- `SN74LVTH245APWRANSR.B`+- `SN74LVTH245APWRANSRG4`+- `SN74LVTH245APWRARGYR`+- `SN74LVTH245APWRARGYR.B`+- `SN74LVTH245APWRARGYRG4`+- `SN74LVTH245APWRARGYRG4.B`+- `SN74LVTH245APWRAFK`+- `SN74LVTH245APWRAJ`+- `SN74LVTH245APWRAW`+- `SN74LVTH245APWRAGQNR`+- `SN74LVTH245APWRAZQNR`++## CAD (KiCad official)++- Symbol: `SN74LVTH245APWR`+- Footprint: `Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm`+- 3D model: TSSOP-20 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn74lvth245a.pdf) (30 pp, sha256 `7af52ff8d823ffed`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn74lvth245apwr-datasheet.pdf)
page.jsonadded+34
@@ -0,0 +1,34 @@+{+  "slug": "sn74lvth245apwr",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Buffer/Driver/Transceiver, TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "logic",+    "sn74lvth245apwr"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "sn74lvth245apwr.kicad_sym",+    "sn74lvth245apwr.kicad_mod",+    "sn74lvth245apwr.glb",+    "sn74lvth245apwr.step",+    "sn74lvth245apwr.lbr",+    "docs/hero.png",+    "docs/sn74lvth245apwr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file