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sn74lvc573apwr: factory component page (tier=mfr)

Ray ·1decaac26f · ·parent 9e03f49
1 file changed +188−8
page.json+188−8
@@ -1,13 +1,198 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "sn74lvc573apwr",+  "title": "SN74LVC573APWR",+  "brief": "Texas Instruments Latches, TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "Texas Instruments Latches, TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "logic",     "sn74lvc573apwr"   ],+  "component": {+    "mpn": "SN74LVC573APWR",+    "manufacturer": "Texas Instruments",+    "package": "TSSOP-20",+    "pin_count": 20,+    "category": "Logic",+    "subcategory": "Latches",+    "datasheet": "https://www.ti.com/lit/ds/symlink/sn74lvc573a.pdf",+    "parts": {+      "symbol": "sn74lvc573apwr.kicad_sym",+      "footprint": "sn74lvc573apwr.kicad_mod",+      "model_3d": "sn74lvc573apwr.glb",+      "model_3d_step": "sn74lvc573apwr.step",+      "lbr": "sn74lvc573apwr.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "OE",+        "type": "input",+        "description": "Output-enable pin, active-low. When high, the eight Q outputs are placed in the high-impedance state; when low, the outputs are enabled to drive their stored/latched data."+      },+      {+        "number": "2",+        "name": "1D",+        "type": "input",+        "description": "D-type latch data input 1. Transparent to 1Q when LE is high; latched on the high-to-low transition of LE."+      },+      {+        "number": "3",+        "name": "2D",+        "type": "input",+        "description": "D-type latch data input 2. Transparent to 2Q when LE is high; latched on the high-to-low transition of LE."+      },+      {+        "number": "4",+        "name": "3D",+        "type": "input",+        "description": "D-type latch data input 3. Transparent to 3Q when LE is high; latched on the high-to-low transition of LE."+      },+      {+        "number": "5",+        "name": "4D",+        "type": "input",+        "description": "D-type latch data input 4. Transparent to 4Q when LE is high; latched on the high-to-low transition of LE."+      },+      {+        "number": "6",+        "name": "5D",+        "type": "input",+        "description": "D-type latch data input 5. Transparent to 5Q when LE is high; latched on the high-to-low transition of LE."+      },+      {+        "number": "7",+        "name": "6D",+        "type": "input",+        "description": "D-type latch data input 6. Transparent to 6Q when LE is high; latched on the high-to-low transition of LE."+      },+      {+        "number": "8",+        "name": "7D",+        "type": "input",+        "description": "D-type latch data input 7. Transparent to 7Q when LE is high; latched on the high-to-low transition of LE."+      },+      {+        "number": "9",+        "name": "8D",+        "type": "input",+        "description": "D-type latch data input 8. Transparent to 8Q when LE is high; latched on the high-to-low transition of LE."+      },+      {+        "number": "10",+        "name": "GND",+        "type": "power_in",+        "description": "Device ground reference (0 V). Continuous current through VCC or GND is limited to \u00b1100 mA."+      },+      {+        "number": "11",+        "name": "LE",+        "type": "input",+        "description": "Latch enable input. When high, the eight latches are transparent (Q follows D); on the high-to-low transition, data present at the D inputs is stored in the latches."+      },+      {+        "number": "12",+        "name": "8Q",+        "type": "tri_state",+        "description": "3-state latched data output 8. Drives 8D data when OE is low; high-impedance when OE is high. IOL/IOH up to \u00b124 mA at VCC = 3 V."+      },+      {+        "number": "13",+        "name": "7Q",+        "type": "tri_state",+        "description": "3-state latched data output 7. Drives 7D data when OE is low; high-impedance when OE is high."+      },+      {+        "number": "14",+        "name": "6Q",+        "type": "tri_state",+        "description": "3-state latched data output 6. Drives 6D data when OE is low; high-impedance when OE is high."+      },+      {+        "number": "15",+        "name": "5Q",+        "type": "tri_state",+        "description": "3-state latched data output 5. Drives 5D data when OE is low; high-impedance when OE is high."+      },+      {+        "number": "16",+        "name": "4Q",+        "type": "tri_state",+        "description": "3-state latched data output 4. Drives 4D data when OE is low; high-impedance when OE is high."+      },+      {+        "number": "17",+        "name": "3Q",+        "type": "tri_state",+        "description": "3-state latched data output 3. Drives 3D data when OE is low; high-impedance when OE is high."+      },+      {+        "number": "18",+        "name": "2Q",+        "type": "tri_state",+        "description": "3-state latched data output 2. Drives 2D data when OE is low; high-impedance when OE is high."+      },+      {+        "number": "19",+        "name": "1Q",+        "type": "tri_state",+        "description": "3-state latched data output 1. Drives 1D data when OE is low; high-impedance when OE is high."+      },+      {+        "number": "20",+        "name": "VCC",+        "type": "power_in",+        "description": "Supply voltage. Operating range 1.65 V to 3.6 V for SN74LVC573A; inputs accept up to 5.5 V for level-translation applications. Decouple locally with a 0.1 \u00b5F ceramic."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://www.ti.com/lit/ds/symlink/sn74lvc573a.pdf",+        "pages": 38,+        "sha256": "1d245c329ee342b0",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 20,+        "described": 20,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "Texas Instruments",+      "Package": "TSSOP-20",+      "Category": "Logic",+      "Pins": "20"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "sn74lvc573apwr"+  ],+  "discovery_pitch": "SN74LVC573APWR (Texas Instruments) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +210,5 @@     "docs/sn74lvc573apwr-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file