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SN74LVC541AQPWREP
Public Made by Adomby adom
Texas Instruments Buffers, Drivers, Receivers, Transceivers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+56@@ -0,0 +1,56 @@+# SN74LVC541AQPWREP++**Texas Instruments** · Buffers, Drivers, Receivers, Transceivers · TSSOP-20++SN74LVC541AQPWREP from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | OE1 | input | Active-low output enable for the first 2-input 3-state AND gate; when OE1 or OE2 is high, all eight outputs are in the high-impedance state, and OE should be tied to VCC through a pullup resistor to ensure high-impedance during power up or power down. |+| 2 | A1 | input | Data input to buffer/driver channel 1; inputs accept voltages up to 5.5 V and can be driven from 3.3-V or 5-V devices. |+| 3 | A2 | input | Data input to buffer/driver channel 2; inputs accept voltages up to 5.5 V and can be driven from 3.3-V or 5-V devices. |+| 4 | A3 | input | Data input to buffer/driver channel 3; inputs accept voltages up to 5.5 V and can be driven from 3.3-V or 5-V devices. |+| 5 | A4 | input | Data input to buffer/driver channel 4; inputs accept voltages up to 5.5 V and can be driven from 3.3-V or 5-V devices. |+| 6 | A5 | input | Data input to buffer/driver channel 5; inputs accept voltages up to 5.5 V and can be driven from 3.3-V or 5-V devices. |+| 7 | A6 | input | Data input to buffer/driver channel 6; inputs accept voltages up to 5.5 V and can be driven from 3.3-V or 5-V devices. |+| 8 | A7 | input | Data input to buffer/driver channel 7; inputs accept voltages up to 5.5 V and can be driven from 3.3-V or 5-V devices. |+| 9 | A8 | input | Data input to buffer/driver channel 8; inputs accept voltages up to 5.5 V and can be driven from 3.3-V or 5-V devices. |+| 10 | GND | power_in | Ground reference for the device; all unused inputs must be held at VCC or GND to ensure proper operation. |+| 11 | Y8 | tri_state | 3-state buffer output of channel 8; high-impedance when OE1 or OE2 is high, and outputs are disabled without damaging backflow when the device is powered down (I_off). |+| 12 | Y7 | tri_state | 3-state buffer output of channel 7; high-impedance when OE1 or OE2 is high, and outputs are disabled without damaging backflow when the device is powered down (I_off). |+| 13 | Y6 | tri_state | 3-state buffer output of channel 6; high-impedance when OE1 or OE2 is high, and outputs are disabled without damaging backflow when the device is powered down (I_off). |+| 14 | Y5 | tri_state | 3-state buffer output of channel 5; high-impedance when OE1 or OE2 is high, and outputs are disabled without damaging backflow when the device is powered down (I_off). |+| 15 | Y4 | tri_state | 3-state buffer output of channel 4; high-impedance when OE1 or OE2 is high, and outputs are disabled without damaging backflow when the device is powered down (I_off). |+| 16 | Y3 | tri_state | 3-state buffer output of channel 3; high-impedance when OE1 or OE2 is high, and outputs are disabled without damaging backflow when the device is powered down (I_off). |+| 17 | Y2 | tri_state | 3-state buffer output of channel 2; high-impedance when OE1 or OE2 is high, and outputs are disabled without damaging backflow when the device is powered down (I_off). |+| 18 | Y1 | tri_state | 3-state buffer output of channel 1; high-impedance when OE1 or OE2 is high, and outputs are disabled without damaging backflow when the device is powered down (I_off). |+| 19 | OE2 | input | Active-low output enable for the second input of the 3-state AND gate; when OE2 or OE1 is high, all eight outputs are in the high-impedance state, and OE should be tied to VCC through a pullup resistor to ensure high-impedance during power up or power down. |+| 20 | VCC | power_in | Supply voltage, operating range 2 V to 3.6 V (data retention down to 1.5 V), with 2.7 V to 3.6 V required for the stated VIH and VIL levels. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-20 |+| Category | Logic |+| Pins | 20 |++## CAD (KiCad official)++- Symbol: `SN74LVC541AQPWREP`+- Footprint: `Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm`+- 3D model: TSSOP-20 (KiCad packages3D, STEP)+- 3D model files: `sn74lvc541aqpwrep-etched.step` / `sn74lvc541aqpwrep-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74lvc541aqpwrep.step` / `sn74lvc541aqpwrep.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn74lvc541a-ep) (16 pp, sha256 `c27fb9eb0f32bcc1`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn74lvc541aqpwrep-datasheet.pdf)
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when OE1 or OE2 is high, all eight outputs are in the high-impedance state, and OE should be tied to VCC through a pullup resistor to ensure high-impedance during power up or power down."+ },+ {+ "number": "2",+ "name": "A1",+ "type": "input",+ "description": "Data input to buffer/driver channel 1; inputs accept voltages up to 5.5 V and can be driven from 3.3-V or 5-V devices."+ },+ {+ "number": "3",+ "name": "A2",+ "type": "input",+ "description": "Data input to buffer/driver channel 2; inputs accept voltages up to 5.5 V and can be driven from 3.3-V or 5-V devices."+ },+ {+ "number": "4",+ "name": "A3",+ "type": "input",+ "description": "Data input to buffer/driver channel 3; inputs accept voltages up to 5.5 V and can be driven from 3.3-V or 5-V devices."+ },+ {+ "number": "5",+ "name": "A4",+ "type": "input",+ "description": "Data input to buffer/driver channel 4; inputs accept voltages up to 5.5 V and can be driven from 3.3-V or 5-V devices."+ },+ {+ "number": "6",+ "name": "A5",+ "type": "input",+ "description": "Data input to buffer/driver channel 5; inputs accept voltages up to 5.5 V and can be driven from 3.3-V or 5-V devices."+ },+ {+ "number": "7",+ "name": "A6",+ "type": "input",+ "description": "Data input to buffer/driver channel 6; inputs accept voltages up to 5.5 V and can be driven from 3.3-V or 5-V devices."+ },+ {+ "number": "8",+ "name": "A7",+ "type": "input",+ "description": "Data input to buffer/driver channel 7; inputs accept voltages up to 5.5 V and can be driven from 3.3-V or 5-V devices."+ },+ {+ "number": "9",+ "name": "A8",+ "type": "input",+ "description": "Data input to buffer/driver channel 8; inputs accept voltages up to 5.5 V and can be driven from 3.3-V or 5-V devices."+ },+ {+ "number": "10",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference for the device; all unused inputs must be held at VCC or GND to ensure proper operation."+ },+ {+ "number": "11",+ "name": "Y8",+ "type": "tri_state",+ "description": "3-state buffer output of channel 8; high-impedance when OE1 or OE2 is high, and outputs are disabled without damaging backflow when the device is powered down (I_off)."+ },+ {+ "number": "12",+ "name": "Y7",+ "type": "tri_state",+ "description": "3-state buffer output of channel 7; high-impedance when OE1 or OE2 is high, and outputs are disabled without damaging backflow when the device is powered down (I_off)."+ },+ {+ "number": "13",+ "name": "Y6",+ "type": "tri_state",+ "description": "3-state buffer output of channel 6; high-impedance when OE1 or OE2 is high, and outputs are disabled without damaging backflow when the device is powered down (I_off)."+ },+ {+ "number": "14",+ "name": "Y5",+ "type": "tri_state",+ "description": "3-state buffer output of channel 5; high-impedance when OE1 or OE2 is high, and outputs are disabled without damaging backflow when the device is powered down (I_off)."+ },+ {+ "number": "15",+ "name": "Y4",+ "type": "tri_state",+ "description": "3-state buffer output of channel 4; high-impedance when OE1 or OE2 is high, and outputs are disabled without damaging backflow when the device is powered down (I_off)."+ },+ {+ "number": "16",+ "name": "Y3",+ "type": "tri_state",+ "description": "3-state buffer output of channel 3; high-impedance when OE1 or OE2 is high, and outputs are disabled without damaging backflow when the device is powered down (I_off)."+ },+ {+ "number": "17",+ "name": "Y2",+ "type": "tri_state",+ "description": "3-state buffer output of channel 2; high-impedance when OE1 or OE2 is high, and outputs are disabled without damaging backflow when the device is powered down (I_off)."+ },+ {+ "number": "18",+ "name": "Y1",+ "type": "tri_state",+ "description": "3-state buffer output of channel 1; high-impedance when OE1 or OE2 is high, and outputs are disabled without damaging backflow when the device is powered down (I_off)."+ },+ {+ "number": "19",+ "name": "OE2",+ "type": "input",+ "description": "Active-low output enable for the second input of the 3-state AND gate; when OE2 or OE1 is high, all eight outputs are in the high-impedance state, and OE should be tied to VCC through a pullup resistor to ensure high-impedance during power up or power down."+ },+ {+ "number": "20",+ "name": "VCC",+ "type": "power_in",+ "description": "Supply voltage, operating range 2 V to 3.6 V (data retention down to 1.5 V), with 2.7 V to 3.6 V required for the stated VIH and VIL levels."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The text extraction of the TSSOP top-view drawing lists the pin labels without their numbers. Pin nu; The datasheet gives no explicit pin number for VCC; pin 20 is inferred from the page-2 logic diagram; The orderable part is the TSSOP (PW) variant; the datasheet's DW (SOIC-20) drawing shares the same p"+ ],+ "pages_sent": 16,+ "cost_usd": 0.0723,+ "at": "2026-10-08T16:08:39"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/sn74lvc541a-ep",+ "pages": 16,+ "sha256": "c27fb9eb0f32bcc1",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 20,+ "described": 20,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "sn74lvc541aqpwrep.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 6.5,+ 1.2+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "97339947f3a7196470ec2f1d9f9b92bb2fc2ab66ad53be0cf105192585ef3c9a",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "sn74lvc541aqpwrep-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 6.5,+ 1.2+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "c15f2a8498742c815ba4b9dd3b118e7db9f0bc57ace77f0c7941ab80cf21f9e8",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}