component
SN74LVC2G14DCKR
Public Made by Adomby adom
UMW Inverters, SC70-6. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+104−8@@ -1,13 +1,114 @@ {+ "schema_version": 1,+ "type": "component", "slug": "sn74lvc2g14dckr",+ "title": "SN74LVC2G14DCKR",+ "brief": "UMW Inverters, SC70-6. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "UMW Inverters, SC70-6. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "logic", "sn74lvc2g14dckr" ],+ "component": {+ "mpn": "SN74LVC2G14DCKR",+ "manufacturer": "UMW",+ "package": "SC70-6",+ "pin_count": 6,+ "category": "Logic",+ "subcategory": "Inverters",+ "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2311091745_UMW-Youtai-Semiconductor-Co---Ltd--SN74LVC2G14DCKR-UMW_C7394040.pdf",+ "parts": {+ "symbol": "sn74lvc2g14dckr.kicad_sym",+ "footprint": "sn74lvc2g14dckr.kicad_mod",+ "model_3d": "sn74lvc2g14dckr.glb",+ "model_3d_step": "sn74lvc2g14dckr.step",+ "lbr": "sn74lvc2g14dckr.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "INA1",+ "type": "input",+ "description": "Schmitt-trigger input of inverter channel 1. Tolerates up to 5.5 V regardless of VCC. Hysteresis (VT+ - VT-) is typically 0.4 V at VCC=3 V."+ },+ {+ "number": "2",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference (0 V) for the device. Must be connected to system ground."+ },+ {+ "number": "3",+ "name": "INA2",+ "type": "input",+ "description": "Schmitt-trigger input of inverter channel 2. Tolerates up to 5.5 V regardless of VCC. Hysteresis (VT+ - VT-) is typically 0.4 V at VCC=3 V."+ },+ {+ "number": "4",+ "name": "Y2",+ "type": "output",+ "description": "Inverted push-pull output of channel 2 (Y2 = NOT INA2). Balanced drive of 24 mA sink/source at VCC=3 V. Overbar indicates active-low logic (inverting)."+ },+ {+ "number": "5",+ "name": "VCC",+ "type": "power_in",+ "description": "Positive supply rail, 1.65 V to 5.5 V operating (absolute max -0.5 V to 7 V). Quiescent supply current is typically 1 \u00b5A (10 \u00b5A max) at 5.5 V. Bypass with 0.1 \u00b5F close to pin."+ },+ {+ "number": "6",+ "name": "Y1",+ "type": "output",+ "description": "Inverted push-pull output of channel 1 (Y1 = NOT INA1). Balanced drive of 24 mA sink/source at VCC=3 V. Overbar indicates active-low logic (inverting)."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2311091745_UMW-Youtai-Semiconductor-Co---Ltd--SN74LVC2G14DCKR-UMW_C7394040.pdf",+ "pages": 12,+ "sha256": "80e6f9bba73df83b",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 6,+ "described": 6,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "UMW",+ "Package": "SC70-6",+ "Category": "Logic",+ "Pins": "6"+ }+ },+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "sn74lvc2g14dckr"+ ],+ "discovery_pitch": "SN74LVC2G14DCKR (UMW) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +126,5 @@ "docs/sn74lvc2g14dckr-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }