component
SN74LVC2G132DCUR
Public Made by Adomby adom
Texas Instruments Gates, VSSOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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README.md+14@@ -40,6 +40,20 @@ SN74LVC2G132DCUR from Texas Instruments, in a VSSOP-8. Pinout and pin descriptio - Footprint: `Package_SO:VSSOP-8_2.3x2mm_P0.5mm` - 3D model: VSSOP-8 (KiCad packages3D, STEP) +## 3D model downloads++Two STEP files. Same geometry, different body top:++| File | Size | Use it when |+|---|---|---|+| [`sn74lvc2g132dcur.step`](sn74lvc2g132dcur.step) | 122 KB | You want the bare part, or you mark your own boards. |+| [`sn74lvc2g132dcur-etched.step`](sn74lvc2g132dcur-etched.step) | 3.0 MB | You want the part with `SN74LVC2G132DCUR` already on it. |++The marking in the etched file is real recessed geometry cut into the solid, not a+texture or a decal: 724 faces against 147 in the bare model. It+survives export, section views, and rendering in any CAD tool, and it drops straight+into KiCad or Fusion with no extra setup.+ ## Provenance Data extracted from the manufacturer datasheet, not a distributor listing:
package.json+1−1@@ -1,6 +1,6 @@ { "slug": "sn74lvc2g132dcur",- "version": "0.1.0",+ "version": "0.2.0", "type": "component", "description": "Texas Instruments Gates, VSSOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "tags": [
page.json+10−10@@ -4,7 +4,7 @@ "slug": "sn74lvc2g132dcur", "title": "SN74LVC2G132DCUR", "brief": "Texas Instruments Gates, VSSOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",- "version": "0.1.0",+ "version": "0.2.0", "license": "CC-BY-SA-4.0", "tags": [ "component",@@ -41,13 +41,13 @@ "number": "2", "name": "1B", "type": "input",- "description": "Gate 1 Schmitt-trigger input B. CMOS logic input paired with 1A to form NAND function Y = !(A\u00b7B). Accepts up to 5.5 V."+ "description": "Gate 1 Schmitt-trigger input B. CMOS logic input paired with 1A to form NAND function Y = !(A·B). Accepts up to 5.5 V." }, { "number": "3", "name": "2Y", "type": "output",- "description": "Gate 2 NAND output. Push-pull CMOS output driving \u00b124 mA at VCC=3 V (\u00b132 mA at 4.5 V). Disabled (high-Z) when VCC is removed to allow live insertion."+ "description": "Gate 2 NAND output. Push-pull CMOS output driving ±24 mA at VCC=3 V (±32 mA at 4.5 V). Disabled (high-Z) when VCC is removed to allow live insertion." }, { "number": "4",@@ -65,19 +65,19 @@ "number": "6", "name": "2B", "type": "input",- "description": "Gate 2 Schmitt-trigger input B. CMOS logic input paired with 2A to form NAND function Y = !(A\u00b7B)."+ "description": "Gate 2 Schmitt-trigger input B. CMOS logic input paired with 2A to form NAND function Y = !(A·B)." }, { "number": "7", "name": "1Y", "type": "output",- "description": "Gate 1 NAND output. Push-pull CMOS output driving \u00b124 mA at VCC=3 V. High-Z during partial power-down."+ "description": "Gate 1 NAND output. Push-pull CMOS output driving ±24 mA at VCC=3 V. High-Z during partial power-down." }, { "number": "8", "name": "VCC", "type": "power_in",- "description": "Positive supply, 1.65 V to 5.5 V operating (1.5 V data-retention only). Quiescent ICC 10 \u00b5A max. Decouple with a 0.1 \u00b5F ceramic capacitor to GND close to the pin."+ "description": "Positive supply, 1.65 V to 5.5 V operating (1.5 V data-retention only). Quiescent ICC 10 µA max. Decouple with a 0.1 µF ceramic capacitor to GND close to the pin." } ], "provenance": {@@ -151,9 +151,9 @@ "docs/hero.png", "docs/sn74lvc2g132dcur-datasheet.pdf", "viewers/symbol.html",- "viewers/footprint.html"+ "viewers/footprint.html",+ "pads.json" ],- "visibility": {- "public": true- }+ "visibility": "public",+ "description": "Texas Instruments Gates, VSSOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D." }