← Commit history

orderable attributes: rebuild .lbr with adom-lbr 2.18.0 so MPN, MANUFACTURER and the distributor part numbers reach <technology> (DIGIKEY_PN 296-18802-2-ND, LCSC_PN C130201). The published library carried no attributes at all, so a BOM had nothing to buy from. Distributor PNs matched on exact MPN AND corroborating manufacturer.

Ray ·231f323a91 ·1mo ago ·parent 37cbe95
2 files changed +30−8
page.json+9−6
@@ -26,7 +26,10 @@       "model_3d_step": "sn74lvc2g132dcur.step",       "lbr": "sn74lvc2g132dcur.lbr"     },-    "distributor_links": {},+    "distributor_links": {+      "digikey": "296-18802-2-ND",+      "lcsc": "C130201"+    },     "pins": [       {         "number": "1",@@ -38,13 +41,13 @@         "number": "2",         "name": "1B",         "type": "input",-        "description": "Gate 1 Schmitt-trigger input B. CMOS logic input paired with 1A to form NAND function Y = !(A·B). Accepts up to 5.5 V."+        "description": "Gate 1 Schmitt-trigger input B. CMOS logic input paired with 1A to form NAND function Y = !(A\u00b7B). Accepts up to 5.5 V."       },       {         "number": "3",         "name": "2Y",         "type": "output",-        "description": "Gate 2 NAND output. Push-pull CMOS output driving ±24 mA at VCC=3 V (±32 mA at 4.5 V). Disabled (high-Z) when VCC is removed to allow live insertion."+        "description": "Gate 2 NAND output. Push-pull CMOS output driving \u00b124 mA at VCC=3 V (\u00b132 mA at 4.5 V). Disabled (high-Z) when VCC is removed to allow live insertion."       },       {         "number": "4",@@ -62,19 +65,19 @@         "number": "6",         "name": "2B",         "type": "input",-        "description": "Gate 2 Schmitt-trigger input B. CMOS logic input paired with 2A to form NAND function Y = !(A·B)."+        "description": "Gate 2 Schmitt-trigger input B. CMOS logic input paired with 2A to form NAND function Y = !(A\u00b7B)."       },       {         "number": "7",         "name": "1Y",         "type": "output",-        "description": "Gate 1 NAND output. Push-pull CMOS output driving ±24 mA at VCC=3 V. High-Z during partial power-down."+        "description": "Gate 1 NAND output. Push-pull CMOS output driving \u00b124 mA at VCC=3 V. High-Z during partial power-down."       },       {         "number": "8",         "name": "VCC",         "type": "power_in",-        "description": "Positive supply, 1.65 V to 5.5 V operating (1.5 V data-retention only). Quiescent ICC 10 µA max. Decouple with a 0.1 µF ceramic capacitor to GND close to the pin."+        "description": "Positive supply, 1.65 V to 5.5 V operating (1.5 V data-retention only). Quiescent ICC 10 \u00b5A max. Decouple with a 0.1 \u00b5F ceramic capacitor to GND close to the pin."       }     ],     "provenance": {
sn74lvc2g132dcur.lbr+21−2
@@ -62,11 +62,23 @@   <smd name="6" x="1.4000" y="-0.2500" dx="1.2500" dy="0.3500" layer="1"/>   <smd name="7" x="1.4000" y="0.2500" dx="1.2500" dy="0.3500" layer="1"/>   <smd name="8" x="1.4000" y="0.7500" dx="1.2500" dy="0.3500" layer="1"/>+  <polygon width="0.1200" layer="21">+    <vertex x="-1.4000" y="1.1900"/>+    <vertex x="-1.5400" y="1.3800"/>+    <vertex x="-1.2600" y="1.3800"/>+  </polygon>+  <polygon width="0.1000" layer="51">+    <vertex x="-0.6500" y="1.0000"/>+    <vertex x="1.1500" y="1.0000"/>+    <vertex x="1.1500" y="-1.0000"/>+    <vertex x="-1.1500" y="-1.0000"/>+    <vertex x="-1.1500" y="0.5000"/>+  </polygon>   <wire x1="-1.1056" y1="1.1850" x2="1.2600" y2="1.1850" width="0.1200" layer="21"/>   <wire x1="1.2600" y1="-1.1850" x2="-1.2600" y2="-1.1850" width="0.1200" layer="21"/>   <text x="0" y="1.975" size="1.27" layer="25" align="bottom-center">&gt;NAME</text>   <text x="0" y="-1.975" size="1.27" layer="27" align="top-center">&gt;VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-1.4000" y="1.1900"/><vertex x="-1.5400" y="1.3800"/><vertex x="-1.2600" y="1.3800"/></polygon></package>+</package> </packages> <symbols> <symbol name="SN74LVC2G132DCUR">@@ -104,7 +116,14 @@         <connect gate="G$1" pin="2B" pad="6"/>         <connect gate="G$1" pin="2A" pad="5"/>       </connects>-      <technologies><technology name=""/></technologies>+      <technologies>+        <technology name="">+          <attribute name="MPN" value="SN74LVC2G132DCUR" constant="no"/>+          <attribute name="MANUFACTURER" value="Texas Instruments" constant="no"/>+          <attribute name="DIGIKEY_PN" value="296-18802-2-ND" constant="no"/>+          <attribute name="LCSC_PN" value="C130201" constant="no"/>+        </technology>+      </technologies>     </device>   </devices> </deviceset>