component
SN74LVC2G04DCKR
Public Made by Adomby adom
Texas Instruments Inverters, SOT-363-6. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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sn74lvc2g04dckr: factory component page (tier=lcsc)
4 files changed
+18−21
README.md+6−6@@ -1,8 +1,8 @@ # SN74LVC2G04DCKR -**UMW** · Inverters · SC70-6+**Texas Instruments** · Inverters · SOT-363-6 -SN74LVC2G04DCKR from UMW, in a SC70-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.+SN74LVC2G04DCKR from Texas Instruments, in a SOT-363-6. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD. ## Pinout @@ -19,8 +19,8 @@ SN74LVC2G04DCKR from UMW, in a SC70-6. Pinout and pin descriptions extracted fro | Parameter | Value | |---|---|-| Manufacturer | UMW |-| Package | SC70-6 |+| Manufacturer | Texas Instruments |+| Package | SOT-363-6 | | Category | Logic | | Pins | 6 | @@ -35,13 +35,13 @@ SN74LVC2G04DCKR from UMW, in a SC70-6. Pinout and pin descriptions extracted fro - Symbol: `SN74LVC2G04DCKR` - Footprint: `Package_TO_SOT_SMD:SOT-363_SC-70-6`-- 3D model: SC70-6 (KiCad packages3D, STEP)+- 3D model: SOT-363-6 (KiCad packages3D, STEP) ## Provenance Data extracted from the manufacturer datasheet, not a distributor listing: -- **Datasheet:** [UMW datasheet](docs/sn74lvc2g04dckr-datasheet.pdf) (11 pp, sha256 `31717c0fad81eae7`, retrieved 2026-08-17, tier: lcsc)+- **Datasheet:** [Texas Instruments datasheet](docs/sn74lvc2g04dckr-datasheet.pdf) (11 pp, sha256 `31717c0fad81eae7`, retrieved 2026-08-17, tier: lcsc) - **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - **CAD:** KiCad official libraries (CC-BY-SA 4.0).
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page.json+12−15@@ -3,7 +3,7 @@ "type": "component", "slug": "sn74lvc2g04dckr", "title": "SN74LVC2G04DCKR",- "brief": "UMW Inverters, SC70-6. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "brief": "Texas Instruments Inverters, SOT-363-6. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0", "license": "CC-BY-SA-4.0", "tags": [@@ -13,8 +13,8 @@ ], "component": { "mpn": "SN74LVC2G04DCKR",- "manufacturer": "UMW",- "package": "SC70-6",+ "manufacturer": "Texas Instruments",+ "package": "SOT-363-6", "pin_count": 6, "category": "Logic", "subcategory": "Inverters",@@ -32,7 +32,7 @@ "number": "1", "name": "INA1", "type": "input",- "description": "Logic input to inverter gate 1. CMOS input, overvoltage tolerant up to 5.5V independent of VCC. VIH ≥ 0.7·VCC (VCC ≥ 2.3V), VIL ≤ 0.3·VCC. Input leakage ±1 µA max."+ "description": "Logic input to inverter gate 1. CMOS input, overvoltage tolerant up to 5.5V independent of VCC. VIH \u2265 0.7\u00b7VCC (VCC \u2265 2.3V), VIL \u2264 0.3\u00b7VCC. Input leakage \u00b11 \u00b5A max." }, { "number": "2",@@ -44,25 +44,25 @@ "number": "3", "name": "INA2", "type": "input",- "description": "Logic input to inverter gate 2. CMOS input, overvoltage tolerant up to 5.5V independent of VCC. VIH ≥ 0.7·VCC (VCC ≥ 2.3V), VIL ≤ 0.3·VCC."+ "description": "Logic input to inverter gate 2. CMOS input, overvoltage tolerant up to 5.5V independent of VCC. VIH \u2265 0.7\u00b7VCC (VCC \u2265 2.3V), VIL \u2264 0.3\u00b7VCC." }, { "number": "4", "name": "Y2", "type": "output",- "description": "Inverted logic output of gate 2 (Y2 = /INA2). Push-pull CMOS output with ±24 mA balanced sink/source capability. VOH ≥ VCC−0.1V at 100 µA; VOL ≤ 0.55V at 24 mA (VCC = 3V)."+ "description": "Inverted logic output of gate 2 (Y2 = /INA2). Push-pull CMOS output with \u00b124 mA balanced sink/source capability. VOH \u2265 VCC\u22120.1V at 100 \u00b5A; VOL \u2264 0.55V at 24 mA (VCC = 3V)." }, { "number": "5", "name": "VCC", "type": "power_in",- "description": "Positive supply. Operating range 1.65V to 5.5V; absolute maximum 7V. Quiescent supply current ICC ≤ 10 µA. Bypass with a 0.1 µF ceramic capacitor to GND close to the pin."+ "description": "Positive supply. Operating range 1.65V to 5.5V; absolute maximum 7V. Quiescent supply current ICC \u2264 10 \u00b5A. Bypass with a 0.1 \u00b5F ceramic capacitor to GND close to the pin." }, { "number": "6", "name": "Y1", "type": "output",- "description": "Inverted logic output of gate 1 (Y1 = /INA1). Push-pull CMOS output with ±24 mA balanced sink/source capability. VOH ≥ VCC−0.1V at 100 µA; VOL ≤ 0.55V at 24 mA (VCC = 3V)."+ "description": "Inverted logic output of gate 1 (Y1 = /INA1). Push-pull CMOS output with \u00b124 mA balanced sink/source capability. VOH \u2265 VCC\u22120.1V at 100 \u00b5A; VOL \u2264 0.55V at 24 mA (VCC = 3V)." } ], "provenance": {@@ -88,8 +88,8 @@ }, "metadata": { "specs": {- "Manufacturer": "UMW",- "Package": "SC70-6",+ "Manufacturer": "Texas Instruments",+ "Package": "SOT-363-6", "Category": "Logic", "Pins": "6" }@@ -104,7 +104,7 @@ "discovery_triggers": [ "sn74lvc2g04dckr" ],- "discovery_pitch": "SN74LVC2G04DCKR (UMW) component page with datasheet-verified CAD.",+ "discovery_pitch": "SN74LVC2G04DCKR (Texas Instruments) component page with datasheet-verified CAD.", "author": { "name": "Ray", "email": "[email protected]"@@ -126,8 +126,5 @@ "docs/sn74lvc2g04dckr-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": {- "public": true- }+ ] }