component
SN74LVC1G86DCKR
Public Made by Adomby adom
UMW Gates, SC-70-5. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+98−8@@ -1,13 +1,108 @@ {+ "schema_version": 1,+ "type": "component", "slug": "sn74lvc1g86dckr",+ "title": "SN74LVC1G86DCKR",+ "brief": "Unknown Gates, SC-70-5. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Unknown Gates, SC-70-5. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "logic", "sn74lvc1g86dckr" ],+ "component": {+ "mpn": "SN74LVC1G86DCKR",+ "manufacturer": "Unknown",+ "package": "SC-70-5",+ "pin_count": 5,+ "category": "Logic",+ "subcategory": "Gates",+ "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2403220745_UMW-Youtai-Semiconductor-Co---Ltd--SN74LVC1G86DCKR-UMW_C7394027.pdf",+ "parts": {+ "symbol": "sn74lvc1g86dckr.kicad_sym",+ "footprint": "sn74lvc1g86dckr.kicad_mod",+ "model_3d": "sn74lvc1g86dckr.glb",+ "model_3d_step": "sn74lvc1g86dckr.step",+ "lbr": "sn74lvc1g86dckr.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "INB",+ "type": "input",+ "description": "B-input of the 2-input XOR gate. LVCMOS/TTL compatible logic input, tolerant to VIN up to 7 V independent of VCC. VIH = 0.7\u00b7VCC (VCC 2.3-5.5 V); input leakage \u00b11 \u00b5A max."+ },+ {+ "number": "2",+ "name": "INA",+ "type": "input",+ "description": "A-input of the 2-input XOR gate. LVCMOS/TTL compatible logic input, tolerant to VIN up to 7 V independent of VCC. VIH = 0.7\u00b7VCC (VCC 2.3-5.5 V); input leakage \u00b11 \u00b5A max."+ },+ {+ "number": "3",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference (0 V) for the device. Connect to system ground."+ },+ {+ "number": "4",+ "name": "Y",+ "type": "output",+ "description": "XOR output (Y = A \u2295 B). Push-pull CMOS output, sinks up to 24 mA (IOL) and sources up to 24 mA (IOH) at VCC=3 V; pullup on this pin may be tied to a rail between 0 and 7 V."+ },+ {+ "number": "5",+ "name": "VCC",+ "type": "power_in",+ "description": "Positive supply input. Recommended operating range 1.65 V to 5.5 V (absolute max 7 V). Bypass with a 0.1 \u00b5F ceramic capacitor to GND close to the pin."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2403220745_UMW-Youtai-Semiconductor-Co---Ltd--SN74LVC1G86DCKR-UMW_C7394027.pdf",+ "pages": 12,+ "sha256": "c8149b8b2f74d58d",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 5,+ "described": 5,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Unknown",+ "Package": "SC-70-5",+ "Category": "Logic",+ "Pins": "5"+ }+ },+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "sn74lvc1g86dckr"+ ],+ "discovery_pitch": "SN74LVC1G86DCKR (Unknown) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +120,5 @@ "docs/sn74lvc1g86dckr-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }