← Commit history
page.json+102−8@@ -1,8 +1,11 @@ {+ "schema_version": 1,+ "type": "component", "slug": "sn74lvc1g125",+ "title": "SN74LVC1G125 3-State Buffer",+ "brief": "Single 3-state buffer", "version": "0.1.0",- "type": "component",- "description": "Single 3-state buffer",+ "license": "CC-BY-SA-4.0", "tags": [ "logic", "single-gate",@@ -11,6 +14,102 @@ "ti", "sot-23-5" ],+ "component": {+ "mpn": "SN74LVC1G125",+ "manufacturer": "Texas Instruments",+ "package": "SOT-23-5",+ "pin_count": 5,+ "category": "Logic",+ "subcategory": "Logic Gate",+ "datasheet": "https://www.ti.com/lit/ds/symlink/sn74lvc1g125.pdf",+ "parts": {+ "symbol": "sn74lvc1g125.kicad_sym",+ "footprint": "sn74lvc1g125.kicad_mod",+ "model_3d": "sn74lvc1g125.glb",+ "model_3d_step": "sn74lvc1g125.step"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "OE",+ "type": "input",+ "description": "Active-low output enable. When OE is low, the Y output follows A; when OE is high, Y is placed in a high-impedance (3-state) state. To guarantee Hi-Z during power-up/power-down, pull OE up to VCC through a resistor sized to the driver's sinking capability."+ },+ {+ "number": "2",+ "name": "A",+ "type": "input",+ "description": "Data input to the buffer. Accepts input levels up to 5.5 V independent of VCC (supports voltage down-translation). VIH/VIL thresholds are VCC-dependent per \u00a75.3 Recommended Operating Conditions."+ },+ {+ "number": "3",+ "name": "GND",+ "type": "power_in",+ "description": "Device ground reference (0 V). Continuous current through VCC or GND must not exceed \u00b1100 mA."+ },+ {+ "number": "4",+ "name": "Y",+ "type": "tri_state",+ "description": "Buffered 3-state output. Drives \u00b124 mA at VCC = 3 V and \u00b132 mA at VCC = 4.5 V. High-impedance when OE is high; also supports Ioff live-insertion and back-drive protection when VCC = 0."+ },+ {+ "number": "5",+ "name": "VCC",+ "type": "power_in",+ "description": "Positive supply. Recommended operating range 1.65 V to 5.5 V (data retention 1.5 V min). Bypass with a local ceramic capacitor to GND. ICC max 10 \u00b5A (static)."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/sn74lvc1g125.pdf",+ "pages": 52,+ "sha256": "65afa3f9d879b37c",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 5,+ "described": 5,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Type": "Single 3-state buffer",+ "Logic family": "LVC (CMOS)",+ "Supply voltage": "1.65 V to 5.5 V",+ "Input tolerance": "5 V tolerant",+ "Propagation delay": "4.6 ns typ at 3.3 V",+ "Operating temperature": "-40 C to 125 C"+ }+ },+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "single gate",+ "one-gate logic",+ "glue logic",+ "board-edge logic"+ ],+ "discovery_pitch": "One non-inverting 3-state buffer in a 5-pin package to drive or isolate a single line.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -27,10 +126,5 @@ "docs/sn74lvc1g125-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }