component
SN74LVC1G08DCKR
Public Made by Adomby adom
UMW Gates, SC-70-5. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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README.md+14@@ -41,6 +41,20 @@ SN74LVC1G08DCKR from UMW, in a SC-70-5. Pinout and pin descriptions extracted fr - Footprint: `Package_TO_SOT_SMD:SOT-353_SC-70-5` - 3D model: SC-70-5 (KiCad packages3D, STEP) +## 3D model downloads++Two STEP files. Same geometry, different body top:++| File | Size | Use it when |+|---|---|---|+| [`sn74lvc1g08dckr.step`](sn74lvc1g08dckr.step) | 87 KB | You want the bare part, or you mark your own boards. |+| [`sn74lvc1g08dckr-etched.step`](sn74lvc1g08dckr-etched.step) | 2.6 MB | You want the part with `SN74LVC1G08DCKR` already on it. |++The marking in the etched file is real recessed geometry cut into the solid, not a+texture or a decal: 638 faces against 102 in the bare model. It+survives export, section views, and rendering in any CAD tool, and it drops straight+into KiCad or Fusion with no extra setup.+ ## Provenance Data extracted from the manufacturer datasheet, not a distributor listing:
package.json+1−1@@ -1,6 +1,6 @@ { "slug": "sn74lvc1g08dckr",- "version": "0.1.0",+ "version": "0.2.0", "type": "component", "description": "Texas Instruments Gates, SC-70-5. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "tags": [
page.json+8−8@@ -4,7 +4,7 @@ "slug": "sn74lvc1g08dckr", "title": "SN74LVC1G08DCKR", "brief": "UMW Gates, SC-70-5. Datasheet-verified pinout, KiCad symbol/footprint/3D.",- "version": "0.1.0",+ "version": "0.2.0", "license": "CC-BY-SA-4.0", "tags": [ "component",@@ -34,7 +34,7 @@ "number": "1", "name": "A", "type": "input",- "description": "Logic input A of the 2-input AND gate. CMOS-compatible input; accepts 0 V to 5.5 V regardless of VCC (supports down-translation). VIH \u2265 0.65\u00d7VCC at VCC=1.65-1.95 V; VIH \u2265 2 V at VCC=3-3.6 V."+ "description": "Logic input A of the 2-input AND gate. CMOS-compatible input; accepts 0 V to 5.5 V regardless of VCC (supports down-translation). VIH ≥ 0.65×VCC at VCC=1.65-1.95 V; VIH ≥ 2 V at VCC=3-3.6 V." }, { "number": "2",@@ -52,13 +52,13 @@ "number": "4", "name": "Y", "type": "output",- "description": "AND-gate output, Y = A\u00b7B. Push-pull CMOS output; delivers \u00b124 mA at VCC=3 V (\u00b132 mA at 4.5 V). Output swings rail-to-rail between GND and VCC."+ "description": "AND-gate output, Y = A·B. Push-pull CMOS output; delivers ±24 mA at VCC=3 V (±32 mA at 4.5 V). Output swings rail-to-rail between GND and VCC." }, { "number": "5", "name": "VCC", "type": "power_in",- "description": "Positive supply pin. Recommended operating range 1.65 V to 5.5 V (data retention 1.5 V min). Absolute max 6.5 V. Bypass with a 0.1 \u00b5F capacitor close to the pin."+ "description": "Positive supply pin. Recommended operating range 1.65 V to 5.5 V (data retention 1.5 V min). Absolute max 6.5 V. Bypass with a 0.1 µF capacitor close to the pin." } ], "provenance": {@@ -132,9 +132,9 @@ "docs/hero.png", "docs/sn74lvc1g08dckr-datasheet.pdf", "viewers/symbol.html",- "viewers/footprint.html"+ "viewers/footprint.html",+ "pads.json" ],- "visibility": {- "public": true- }+ "visibility": "public",+ "description": "Texas Instruments Gates, SC-70-5. Datasheet-verified pinout, KiCad symbol/footprint/3D." }