component
SN74LVC1G08DCKR
Public Made by Adomby adom
UMW Gates, SC-70-5. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+7−4@@ -32,7 +32,7 @@ "number": "1", "name": "A", "type": "input",- "description": "Logic input A of the 2-input AND gate. CMOS-compatible input; accepts 0 V to 5.5 V regardless of VCC (supports down-translation). VIH \u2265 0.65\u00d7VCC at VCC=1.65-1.95 V; VIH \u2265 2 V at VCC=3-3.6 V."+ "description": "Logic input A of the 2-input AND gate. CMOS-compatible input; accepts 0 V to 5.5 V regardless of VCC (supports down-translation). VIH ≥ 0.65×VCC at VCC=1.65-1.95 V; VIH ≥ 2 V at VCC=3-3.6 V." }, { "number": "2",@@ -50,13 +50,13 @@ "number": "4", "name": "Y", "type": "output",- "description": "AND-gate output, Y = A\u00b7B. Push-pull CMOS output; delivers \u00b124 mA at VCC=3 V (\u00b132 mA at 4.5 V). Output swings rail-to-rail between GND and VCC."+ "description": "AND-gate output, Y = A·B. Push-pull CMOS output; delivers ±24 mA at VCC=3 V (±32 mA at 4.5 V). Output swings rail-to-rail between GND and VCC." }, { "number": "5", "name": "VCC", "type": "power_in",- "description": "Positive supply pin. Recommended operating range 1.65 V to 5.5 V (data retention 1.5 V min). Absolute max 6.5 V. Bypass with a 0.1 \u00b5F capacitor close to the pin."+ "description": "Positive supply pin. Recommended operating range 1.65 V to 5.5 V (data retention 1.5 V min). Absolute max 6.5 V. Bypass with a 0.1 µF capacitor close to the pin." } ], "provenance": {@@ -120,5 +120,8 @@ "docs/sn74lvc1g08dckr-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ]+ ],+ "visibility": {+ "public": true+ } }