sn74lvc1g06dbvr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC…
sn74lvc1g06dbvr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout")
sn74lvc1g06dbvr: laser-etched CAD + chip hero (factory 2.0.0 backfill)
sn74lvc1g06dbvr: stamp component.logic (74LVC1G06) from component-ocean
sn74lvc1g06dbvr: backfill missing artifacts (variants)
sn74lvc1g06dbvr: publish the laser-etched STEP alongside the bare one
sn74lvc1g06dbvr: factory component page (tier=mfr)
Initial commit: component/sn74lvc1g06dbvr