SN74LVC1G04DCKR

@@ -0,0 +1,49 @@+# SN74LVC1G04DCKR++**Unknown** · Inverters · SC-70-5++SN74LVC1G04DCKR from Unknown, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | NC | unconnected | No connection. Empty foot with no internal die bond; leave floating or tie to a static net per board convention. |+| 2 | A | input | Logic input to the inverter. CMOS-compatible thresholds scale with VCC (VIH ≈ 0.7·VCC, VIL ≈ 0.3·VCC at VCC = 3-5.5 V). Input leakage typically 0.1 µA, absolute max ±5.5 V regardless of VCC. |+| 3 | GND | power_in | Device ground / 0 V reference for the logic and output stages. |+| 4 | Y | output | Inverted logic output (Y = /A). Push-pull CMOS drive rated up to ±32 mA at VCC = 4.5 V (±16 mA at 3 V, ±8 mA at 2.3 V, ±4 mA at 1.65 V). Swings rail-to-rail into a light load. |+| 5 | VCC | power_in | Positive supply, 1.65 V to 5.5 V operating (6.5 V absolute max). Bypass with a local 0.1 µF ceramic to GND. Static ICC ~0.1 µA typical. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Unknown |+| Package | SC-70-5 |+| Category | Logic |+| Pins | 5 |++## Ordering variants++- `SN74LVC1G04DCKRDCKR`+- `SN74LVC1G04DCKRDBVR`+- `SN74LVC1G04DCKRDPWR`+- `SN74LVC1G04DCKRDRLR`+- `SN74LVC1G04DCKRYZPR`+- `SN74LVC1G04DCKRDSFR`++## CAD (KiCad official)++- Symbol: `SN74LVC1G04DCKR`+- Footprint: `Package_TO_SOT_SMD:SOT-353_SC-70-5`+- 3D model: SC-70-5 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Unknown datasheet](docs/sn74lvc1g04dckr-datasheet.pdf) (15 pp, sha256 `900ca612376ee7ff`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn74lvc1g04dckr-datasheet.pdf)

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