component
SN74LVC1G02DRLR
Public Made by Adomby adom
Texas Instruments Logic Gates, SOT-553-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
sn74lvc1g02drlr: factory component page (tier=mfr)
3 files changed
+14031−27
page.json+48−27@@ -1,8 +1,11 @@ {+ "schema_version": 1,+ "type": "component", "slug": "sn74lvc1g02drlr",+ "title": "SN74LVC1G02DRLR",+ "brief": "Texas Instruments Logic Gates, SOT-553-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Texas Instruments Logic Gates, SOT-553-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "logic",@@ -10,24 +13,6 @@ "factory-2.0.0", "extractor-text" ],- "dependencies": {},- "hero": {- "type": "image",- "path": "docs/hero.png"- },- "files": [- "page.json",- "README.md",- "sn74lvc1g02drlr.kicad_sym",- "sn74lvc1g02drlr.kicad_mod",- "sn74lvc1g02drlr.glb",- "sn74lvc1g02drlr.step",- "sn74lvc1g02drlr.lbr",- "docs/hero.png",- "docs/sn74lvc1g02drlr-datasheet.pdf",- "viewers/symbol.html",- "viewers/footprint.html"- ], "component": { "mpn": "SN74LVC1G02DRLR", "manufacturer": "Texas Instruments",@@ -67,13 +52,13 @@ "number": "1", "name": "A", "type": "input",- "description": "Logic input accepting voltages from 0 to 5.5V with maximum input leakage current of ±5μA and high-impedance CMOS input structure."+ "description": "Logic input accepting voltages from 0 to 5.5V with maximum input leakage current of \u00b15\u03bcA and high-impedance CMOS input structure." }, { "number": "2", "name": "B", "type": "input",- "description": "Logic input accepting voltages from 0 to 5.5V with maximum input leakage current of ±5μA and high-impedance CMOS input structure."+ "description": "Logic input accepting voltages from 0 to 5.5V with maximum input leakage current of \u00b15\u03bcA and high-impedance CMOS input structure." }, { "number": "3",@@ -85,13 +70,13 @@ "number": "4", "name": "Y", "type": "output",- "description": "NOR gate output (Y = A•B in positive logic) with push-pull CMOS balanced output capable of sourcing/sinking maximum ±24mA at 3.3V and output voltage range 0 to VCC."+ "description": "NOR gate output (Y = A\u2022B in positive logic) with push-pull CMOS balanced output capable of sourcing/sinking maximum \u00b124mA at 3.3V and output voltage range 0 to VCC." }, { "number": "5", "name": "VCC", "type": "power_out",- "description": "Positive power supply terminal with recommended operating voltage range 1.65V to 5.5V and maximum quiescent supply current of 10μA."+ "description": "Positive power supply terminal with recommended operating voltage range 1.65V to 5.5V and maximum quiescent supply current of 10\u03bcA." } ], "provenance": {@@ -128,10 +113,46 @@ "footprint": "viewers/footprint.html" } },- "visibility": "public",- "org": "adom",+ "metadata": {+ "specs": {+ "Manufacturer": "Texas Instruments",+ "Package": "SOT-553-5",+ "Category": "Logic",+ "Pins": "5"+ }+ },+ "variants": [],+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "sn74lvc1g02drlr"+ ],+ "discovery_pitch": "SN74LVC1G02DRLR (Texas Instruments) component page: datasheet pinout, KiCad symbol, footprint and 3D.", "author": { "name": "Ray", "email": "[email protected]"- }+ },+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "sn74lvc1g02drlr.kicad_sym",+ "sn74lvc1g02drlr.kicad_mod",+ "sn74lvc1g02drlr.glb",+ "sn74lvc1g02drlr.step",+ "sn74lvc1g02drlr.lbr",+ "docs/hero.png",+ "docs/sn74lvc1g02drlr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ] }
sn74lvc1g02drlr-etched.glbadded⋯ 1 unchanged line ⋯
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