component
SN74LVC1G02DRLR
Public Made by Adomby adom
Texas Instruments Logic Gates, SOT-553-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
sn74lvc1g02drlr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero
4 files changed
+5151−13732
docs/hero.png⋯ 1 unchanged line ⋯
sn74lvc1g02drlr-etched.fit.jsonadded+1@@ -0,0 +1 @@+{"orientation_deg": 270, "font_size_mm": 0.1482, "reading": {"source": "pin1_xy", "pin1_xy": [-0.713, 0.5], "dot": [-0.223, 0.423], "dot_agrees": true}, "legible_estimate": true, "natural_up": null, "overflow": false}
sn74lvc1g02drlr-etched.glb⋯ 1 unchanged line ⋯
sn74lvc1g02drlr-etched.step+5150−13732@@ -1,7 +1,7 @@ ISO-10303-21; HEADER; FILE_DESCRIPTION(('Open CASCADE Model'),'2;1');-FILE_NAME('Open CASCADE Shape Model','2026-09-27T13:46:29',('Author'),(+FILE_NAME('Open CASCADE Shape Model','2026-10-02T21:27:50',('Author'),( 'Open CASCADE'),'Open CASCADE STEP processor 7.8','Open CASCADE 7.8' ,'Unknown'); FILE_SCHEMA(('AUTOMOTIVE_DESIGN { 1 0 10303 214 1 1 1 1 }'));@@ -48,110 +48,139 @@ GLOBAL_UNCERTAINTY_ASSIGNED_CONTEXT((#27)) GLOBAL_UNIT_ASSIGNED_CONTEXT( #33 = PRODUCT('Adom.Chip','Adom.Chip','',(#34)); #34 = PRODUCT_CONTEXT('',#2,'mechanical'); #35 = PRODUCT_DEFINITION_CONTEXT('part definition',#2,'design');-#36 = ADVANCED_BREP_SHAPE_REPRESENTATION('',(#11,#37),#2275);-#37 = MANIFOLD_SOLID_BREP('',#38);-#38 = CLOSED_SHELL('',(#39,#79,#110,#240,#264,#387,#498,#515,#538,#660,- #788,#805,#836,#1063,#1094,#1321,#1352,#1383,#1511,#1639,#1656,#1694- ,#1726,#1776,#1808,#1825,#1857,#1874,#1906,#1938,#1955,#1987,#2019,- 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