← Commit history

sn74lvc125apwr: factory component page (tier=mfr)

Ray ·79cd50ab95 ·1mo ago ·parent 38828bb
1 file changed +152−8
page.json+152−8
@@ -1,13 +1,162 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "sn74lvc125apwr",+  "title": "SN74LVC125APWR",+  "brief": "Texas Instruments Buffer/Driver/Transceiver, TSSOP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "Texas Instruments Buffer/Driver/Transceiver, TSSOP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "logic",     "sn74lvc125apwr"   ],+  "component": {+    "mpn": "SN74LVC125APWR",+    "manufacturer": "Texas Instruments",+    "package": "TSSOP-14",+    "pin_count": 14,+    "category": "Logic",+    "subcategory": "Buffer/Driver/Transceiver",+    "datasheet": "https://www.ti.com/lit/ds/symlink/sn74lvc125a.pdf",+    "parts": {+      "symbol": "sn74lvc125apwr.kicad_sym",+      "footprint": "sn74lvc125apwr.kicad_mod",+      "model_3d": "sn74lvc125apwr.glb",+      "model_3d_step": "sn74lvc125apwr.step",+      "lbr": "sn74lvc125apwr.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "1OE",+        "type": "input",+        "description": "Active-low output enable for buffer 1. When high, output 1Y is placed in a high-impedance (Hi-Z) state. VIH threshold is 2V at VCC=2.7-3.6V; inputs tolerate up to 5.5V."+      },+      {+        "number": "2",+        "name": "1A",+        "type": "input",+        "description": "Data input for buffer 1. CMOS logic input, 5.5V tolerant. Drives 1Y when 1OE is low."+      },+      {+        "number": "3",+        "name": "1Y",+        "type": "tri_state",+        "description": "3-state output for buffer 1. Drives IOH up to -24 mA / IOL up to 24 mA at VCC=3V; Hi-Z when 1OE is high."+      },+      {+        "number": "4",+        "name": "2OE",+        "type": "input",+        "description": "Active-low output enable for buffer 2. When high, output 2Y is placed in a high-impedance state."+      },+      {+        "number": "5",+        "name": "2A",+        "type": "input",+        "description": "Data input for buffer 2. CMOS logic input, 5.5V tolerant."+      },+      {+        "number": "6",+        "name": "2Y",+        "type": "tri_state",+        "description": "3-state output for buffer 2. Hi-Z when 2OE is high."+      },+      {+        "number": "7",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference (0 V). Return for VCC supply and all logic signals."+      },+      {+        "number": "8",+        "name": "3Y",+        "type": "tri_state",+        "description": "3-state output for buffer 3. Hi-Z when 3OE is high."+      },+      {+        "number": "9",+        "name": "3A",+        "type": "input",+        "description": "Data input for buffer 3. CMOS logic input, 5.5V tolerant."+      },+      {+        "number": "10",+        "name": "3OE",+        "type": "input",+        "description": "Active-low output enable for buffer 3. When high, output 3Y is placed in a high-impedance state."+      },+      {+        "number": "11",+        "name": "4Y",+        "type": "tri_state",+        "description": "3-state output for buffer 4. Hi-Z when 4OE is high."+      },+      {+        "number": "12",+        "name": "4A",+        "type": "input",+        "description": "Data input for buffer 4. CMOS logic input, 5.5V tolerant."+      },+      {+        "number": "13",+        "name": "4OE",+        "type": "input",+        "description": "Active-low output enable for buffer 4. When high, output 4Y is placed in a high-impedance state."+      },+      {+        "number": "14",+        "name": "VCC",+        "type": "power_in",+        "description": "Positive supply. Operating range 1.65V to 3.6V. Decouple with a 100 nF ceramic capacitor to GND close to the pin."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://www.ti.com/lit/ds/symlink/sn74lvc125a.pdf",+        "pages": 40,+        "sha256": "e5f2475398050a7d",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 14,+        "described": 14,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "Texas Instruments",+      "Package": "TSSOP-14",+      "Category": "Logic",+      "Pins": "14"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "sn74lvc125apwr"+  ],+  "discovery_pitch": "SN74LVC125APWR (Texas Instruments) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +174,5 @@     "docs/sn74lvc125apwr-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file