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Initial commit: component/sn74lv1t34qdckrq1

Ray ·480d73c854 ·3d ago
2 files changed +180
README.mdadded+41
@@ -0,0 +1,41 @@+# SN74LV1T34QDCKRQ1++**Texas Instruments** · Buffers, Drivers, Receivers, Transceivers · SC-70-5++SN74LV1T34QDCKRQ1 from Texas Instruments, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | N.C. | unconnected | No Connect pin. |+| 2 | A | input | Channel 1 input supporting voltage level translation with 5.5 V tolerance, input voltage range 0 to 5.5 V. |+| 3 | GND | power_in | Ground reference. |+| 4 | Y | output | Channel 1 output implementing Y = A logic function, output voltage range 0 to VCC V. |+| 5 | VCC | power_in | Positive supply voltage, operating range 1.6 V to 5.5 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SC-70-5 |+| Category | Logic |+| Pins | 5 |++## CAD (KiCad official)++- Symbol: `SN74LV1T34QDCKRQ1`+- Footprint: `Package_TO_SOT_SMD:SOT-353_SC-70-5`+- 3D model: SC-70-5 (KiCad packages3D, STEP)+- 3D model files: `sn74lv1t34qdckrq1-etched.step` / `sn74lv1t34qdckrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74lv1t34qdckrq1.step` / `sn74lv1t34qdckrq1.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8600798794057596928) (24 pp, sha256 `1dde034b636180e7`, retrieved 2026-10-03, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn74lv1t34qdckrq1-datasheet.pdf)
page.jsonadded+139
@@ -0,0 +1,139 @@+{+  "slug": "sn74lv1t34qdckrq1",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Buffers, Drivers, Receivers, Transceivers, SC-70-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "logic",+    "sn74lv1t34qdckrq1",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "sn74lv1t34qdckrq1.kicad_sym",+    "sn74lv1t34qdckrq1.kicad_mod",+    "sn74lv1t34qdckrq1.glb",+    "sn74lv1t34qdckrq1.step",+    "sn74lv1t34qdckrq1.lbr",+    "docs/hero.png",+    "docs/sn74lv1t34qdckrq1-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "sn74lv1t34qdckrq1-hero.glb",+    "sn74lv1t34qdckrq1-hero.overlay.json"+  ],+  "component": {+    "mpn": "SN74LV1T34QDCKRQ1",+    "manufacturer": "Texas Instruments",+    "package": "SC-70-5",+    "pin_count": 5,+    "category": "Logic",+    "subcategory": "Buffers, Drivers, Receivers, Transceivers",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8600798794057596928",+    "parts": {+      "symbol": "sn74lv1t34qdckrq1.kicad_sym",+      "footprint": "sn74lv1t34qdckrq1.kicad_mod",+      "model_3d": "sn74lv1t34qdckrq1-hero.glb",+      "model_3d_plain": "sn74lv1t34qdckrq1.glb",+      "model_3d_step": "sn74lv1t34qdckrq1-etched.step",+      "model_3d_step_plain": "sn74lv1t34qdckrq1.step",+      "lbr": "sn74lv1t34qdckrq1.lbr"+    },+    "distributor_links": {+      "lcsc": 6489204,+      "digikey": "296-SN74LV1T34QDCKRQ1TR-ND",+      "mouser": "595-N74LV1T34QDCKRQ1"+    },+    "distributor_check": {+      "checked_at": "2026-10-03T01:37:52Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-SN74LV1T34QDCKRQ1TR-ND",+        "status": "found"+      },+      "mouser": {+        "pn": "595-N74LV1T34QDCKRQ1",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "N.C.",+        "type": "unconnected",+        "description": "No Connect pin."+      },+      {+        "number": "2",+        "name": "A",+        "type": "input",+        "description": "Channel 1 input supporting voltage level translation with 5.5 V tolerance, input voltage range 0 to 5.5 V."+      },+      {+        "number": "3",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference."+      },+      {+        "number": "4",+        "name": "Y",+        "type": "output",+        "description": "Channel 1 output implementing Y = A logic function, output voltage range 0 to VCC V."+      },+      {+        "number": "5",+        "name": "VCC",+        "type": "power_in",+        "description": "Positive supply voltage, operating range 1.6 V to 5.5 V."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [],+        "pages_sent": 7,+        "cost_usd": 0.0703,+        "at": "2026-10-03T01:37:33"+      },+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8600798794057596928",+        "pages": 24,+        "sha256": "1dde034b636180e7",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 5,+        "described": 5,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file