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Initial commit: component/sn74ls51dr

Ray ·be3d72cd28 ·14h ago
2 files changed +287
README.mdadded+50
@@ -0,0 +1,50 @@+# SN74LS51DR++**Texas Instruments** · Logic Gates · SOIC-14++SN74LS51DR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1A | input | Gate 1 input A, part of the first AND term (1A·1B·1C) of the 3-input AND-OR-invert gate. |+| 2 | 2A | input | Gate 2 input A, part of the first AND term (2A·2B) of the 2-input AND-OR-invert gate. |+| 3 | 2B | input | Gate 2 input B, part of the first AND term (2A·2B) of the 2-input AND-OR-invert gate. |+| 4 | 2C | input | Gate 2 input C, part of the second AND term (2C·2D) of the 2-input AND-OR-invert gate. |+| 5 | 2D | input | Gate 2 input D, part of the second AND term (2C·2D) of the 2-input AND-OR-invert gate. |+| 6 | 2Y | output | Gate 2 output, 2Y = NOT[(2A·2B)+(2C·2D)]. |+| 7 | GND | power_in | Ground. |+| 8 | 1Y | output | Gate 1 output, 1Y = NOT[(1A·1B·1C)+(1D·1E·1F)]. |+| 9 | 1D | input | Gate 1 input D, part of the second AND term (1D·1E·1F) of the 3-input AND-OR-invert gate. |+| 10 | 1E | input | Gate 1 input E, part of the second AND term (1D·1E·1F) of the 3-input AND-OR-invert gate. |+| 11 | 1F | input | Gate 1 input F, part of the second AND term (1D·1E·1F) of the 3-input AND-OR-invert gate. |+| 12 | 1B | input | Gate 1 input B, part of the first AND term (1A·1B·1C) of the 3-input AND-OR-invert gate. |+| 13 | 1C | input | Gate 1 input C, part of the first AND term (1A·1B·1C) of the 3-input AND-OR-invert gate. |+| 14 | VCC | power_in | Supply voltage. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-14 |+| Category | Logic |+| Pins | 14 |++## CAD (KiCad official)++- Symbol: `SN74LS51DR`+- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`+- 3D model: SOIC-14 (KiCad packages3D, STEP)+- 3D model files: `sn74ls51dr-etched.step` / `sn74ls51dr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74ls51dr.step` / `sn74ls51dr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn74ls51.pdf) (24 pp, sha256 `8dae26aa17b15caa`, retrieved 2026-10-07, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn74ls51dr-datasheet.pdf)
page.jsonadded+237
@@ -0,0 +1,237 @@+{+  "slug": "sn74ls51dr",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Logic Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "logic",+    "sn74ls51dr",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "sn74ls51dr.kicad_sym",+    "sn74ls51dr.kicad_mod",+    "sn74ls51dr.glb",+    "sn74ls51dr.step",+    "sn74ls51dr.lbr",+    "docs/hero.png",+    "docs/sn74ls51dr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "sn74ls51dr-hero.glb",+    "sn74ls51dr-hero.overlay.json"+  ],+  "component": {+    "mpn": "SN74LS51DR",+    "manufacturer": "Texas Instruments",+    "package": "SOIC-14",+    "pin_count": 14,+    "category": "Logic",+    "subcategory": "Logic Gates",+    "datasheet": "https://www.ti.com/lit/ds/symlink/sn74ls51.pdf",+    "parts": {+      "symbol": "sn74ls51dr.kicad_sym",+      "footprint": "sn74ls51dr.kicad_mod",+      "model_3d": "sn74ls51dr-hero.glb",+      "model_3d_plain": "sn74ls51dr.glb",+      "model_3d_step": "sn74ls51dr-etched.step",+      "model_3d_step_plain": "sn74ls51dr.step",+      "lbr": "sn74ls51dr.lbr"+    },+    "distributor_links": {+      "lcsc": "C2872503",+      "digikey": "296-28985-2-ND",+      "mouser": "595-SN74LS51DR"+    },+    "distributor_check": {+      "checked_at": "2026-10-07T02:39:21Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-28985-2-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "595-SN74LS51DR",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "1A",+        "type": "input",+        "description": "Gate 1 input A, part of the first AND term (1A·1B·1C) of the 3-input AND-OR-invert gate."+      },+      {+        "number": "2",+        "name": "2A",+        "type": "input",+        "description": "Gate 2 input A, part of the first AND term (2A·2B) of the 2-input AND-OR-invert gate."+      },+      {+        "number": "3",+        "name": "2B",+        "type": "input",+        "description": "Gate 2 input B, part of the first AND term (2A·2B) of the 2-input AND-OR-invert gate."+      },+      {+        "number": "4",+        "name": "2C",+        "type": "input",+        "description": "Gate 2 input C, part of the second AND term (2C·2D) of the 2-input AND-OR-invert gate."+      },+      {+        "number": "5",+        "name": "2D",+        "type": "input",+        "description": "Gate 2 input D, part of the second AND term (2C·2D) of the 2-input AND-OR-invert gate."+      },+      {+        "number": "6",+        "name": "2Y",+        "type": "output",+        "description": "Gate 2 output, 2Y = NOT[(2A·2B)+(2C·2D)]."+      },+      {+        "number": "7",+        "name": "GND",+        "type": "power_in",+        "description": "Ground."+      },+      {+        "number": "8",+        "name": "1Y",+        "type": "output",+        "description": "Gate 1 output, 1Y = NOT[(1A·1B·1C)+(1D·1E·1F)]."+      },+      {+        "number": "9",+        "name": "1D",+        "type": "input",+        "description": "Gate 1 input D, part of the second AND term (1D·1E·1F) of the 3-input AND-OR-invert gate."+      },+      {+        "number": "10",+        "name": "1E",+        "type": "input",+        "description": "Gate 1 input E, part of the second AND term (1D·1E·1F) of the 3-input AND-OR-invert gate."+      },+      {+        "number": "11",+        "name": "1F",+        "type": "input",+        "description": "Gate 1 input F, part of the second AND term (1D·1E·1F) of the 3-input AND-OR-invert gate."+      },+      {+        "number": "12",+        "name": "1B",+        "type": "input",+        "description": "Gate 1 input B, part of the first AND term (1A·1B·1C) of the 3-input AND-OR-invert gate."+      },+      {+        "number": "13",+        "name": "1C",+        "type": "input",+        "description": "Gate 1 input C, part of the first AND term (1A·1B·1C) of the 3-input AND-OR-invert gate."+      },+      {+        "number": "14",+        "name": "VCC",+        "type": "power_in",+        "description": "Supply voltage."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-sonnet-5-5",+        "primary_mode": "text+vision",+        "consensus_model": "claude-opus-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: The pinout comes from the 'SN74LS51 ... D OR N PACKAGE' top-view diagram on page 1, which is an imag",+          "vision extraction: provenance cannot be text-verified; needs consensus"+        ],+        "pages_sent": 24,+        "cost_usd": 0.4225,+        "at": "2026-10-07T02:39:05"+      },+      "datasheet": {+        "url": "https://www.ti.com/lit/ds/symlink/sn74ls51.pdf",+        "pages": 24,+        "sha256": "8dae26aa17b15caa",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 14,+        "described": 14,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "sn74ls51dr.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6,+          8.7,+          1.75+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "3b9a775da256c8afcc28dcddfbc2eb3f266107fe61ce8446d96f2c52b6f44a70",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "sn74ls51dr-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6,+          8.7,+          1.75+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "1d79cccaa252e9b2c40c5d9c494d688a0f8ae7fd76658888e56c7bad3d52cc0f",+        "checked": "2026-10-07",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file