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SN74LS373DWR
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Texas Instruments Latches, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+56@@ -0,0 +1,56 @@+# SN74LS373DWR++**Texas Instruments** · Latches · SOIC-20-300mil++SN74LS373DWR from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | OC | input | Buffered active-low output control; when low the eight 3-state outputs are enabled, and when high they are placed in the high-impedance state without affecting the internal latch operation. |+| 2 | 1Q | tri_state | Latch 1 bus-driving 3-state output that follows the latched data and goes high-impedance when OC is high. |+| 3 | 1D | input | Data input for latch 1; while C is high the Q output follows D, and the level present when C goes low is latched. |+| 4 | 2D | input | Data input for latch 2; while C is high the Q output follows D, and the level present when C goes low is latched. |+| 5 | 2Q | tri_state | Latch 2 bus-driving 3-state output that follows the latched data and goes high-impedance when OC is high. |+| 6 | 3Q | tri_state | Latch 3 bus-driving 3-state output that follows the latched data and goes high-impedance when OC is high. |+| 7 | 3D | input | Data input for latch 3; while C is high the Q output follows D, and the level present when C goes low is latched. |+| 8 | 4D | input | Data input for latch 4; while C is high the Q output follows D, and the level present when C goes low is latched. |+| 9 | 4Q | tri_state | Latch 4 bus-driving 3-state output that follows the latched data and goes high-impedance when OC is high. |+| 10 | GND | power_in | Ground reference for the device. |+| 11 | C | input | Latch enable input for the ’LS373; the Q outputs follow D while C is high and hold the data when C goes low. |+| 12 | 5Q | tri_state | Latch 5 bus-driving 3-state output that follows the latched data and goes high-impedance when OC is high. |+| 13 | 5D | input | Data input for latch 5; while C is high the Q output follows D, and the level present when C goes low is latched. |+| 14 | 6D | input | Data input for latch 6; while C is high the Q output follows D, and the level present when C goes low is latched. |+| 15 | 6Q | tri_state | Latch 6 bus-driving 3-state output that follows the latched data and goes high-impedance when OC is high. |+| 16 | 7Q | tri_state | Latch 7 bus-driving 3-state output that follows the latched data and goes high-impedance when OC is high. |+| 17 | 7D | input | Data input for latch 7; while C is high the Q output follows D, and the level present when C goes low is latched. |+| 18 | 8D | input | Data input for latch 8; while C is high the Q output follows D, and the level present when C goes low is latched. |+| 19 | 8Q | tri_state | Latch 8 bus-driving 3-state output that follows the latched data and goes high-impedance when OC is high. |+| 20 | VCC | power_in | Supply voltage pin; the datasheet text provided does not state its numeric limits. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-20-300mil |+| Category | Logic |+| Pins | 20 |++## CAD (KiCad official)++- Symbol: `SN74LS373DWR`+- Footprint: `Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm`+- 3D model: SOIC-20-300mil (KiCad packages3D, STEP)+- 3D model files: `sn74ls373dwr-etched.step` / `sn74ls373dwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74ls373dwr.step` / `sn74ls373dwr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn74ls374) (34 pp, sha256 `5d2c396010d2b304`, retrieved 2026-10-07, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn74ls373dwr-datasheet.pdf)
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when low the eight 3-state outputs are enabled, and when high they are placed in the high-impedance state without affecting the internal latch operation."+ },+ {+ "number": "2",+ "name": "1Q",+ "type": "tri_state",+ "description": "Latch 1 bus-driving 3-state output that follows the latched data and goes high-impedance when OC is high."+ },+ {+ "number": "3",+ "name": "1D",+ "type": "input",+ "description": "Data input for latch 1; while C is high the Q output follows D, and the level present when C goes low is latched."+ },+ {+ "number": "4",+ "name": "2D",+ "type": "input",+ "description": "Data input for latch 2; while C is high the Q output follows D, and the level present when C goes low is latched."+ },+ {+ "number": "5",+ "name": "2Q",+ "type": "tri_state",+ "description": "Latch 2 bus-driving 3-state output that follows the latched data and goes high-impedance when OC is high."+ },+ {+ "number": "6",+ "name": "3Q",+ "type": "tri_state",+ "description": "Latch 3 bus-driving 3-state output that follows the latched data and goes high-impedance when OC is high."+ },+ {+ "number": "7",+ "name": "3D",+ "type": "input",+ "description": "Data input for latch 3; while C is high the Q output follows D, and the level present when C goes low is latched."+ },+ {+ "number": "8",+ "name": "4D",+ "type": "input",+ "description": "Data input for latch 4; while C is high the Q output follows D, and the level present when C goes low is latched."+ },+ {+ "number": "9",+ "name": "4Q",+ "type": "tri_state",+ "description": "Latch 4 bus-driving 3-state output that follows the latched data and goes high-impedance when OC is high."+ },+ {+ "number": "10",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference for the device."+ },+ {+ "number": "11",+ "name": "C",+ "type": "input",+ "description": "Latch enable input for the ’LS373; the Q outputs follow D while C is high and hold the data when C goes low."+ },+ {+ "number": "12",+ "name": "5Q",+ "type": "tri_state",+ "description": "Latch 5 bus-driving 3-state output that follows the latched data and goes high-impedance when OC is high."+ },+ {+ "number": "13",+ "name": "5D",+ "type": "input",+ "description": "Data input for latch 5; while C is high the Q output follows D, and the level present when C goes low is latched."+ },+ {+ "number": "14",+ "name": "6D",+ "type": "input",+ "description": "Data input for latch 6; while C is high the Q output follows D, and the level present when C goes low is latched."+ },+ {+ "number": "15",+ "name": "6Q",+ "type": "tri_state",+ "description": "Latch 6 bus-driving 3-state output that follows the latched data and goes high-impedance when OC is high."+ },+ {+ "number": "16",+ "name": "7Q",+ "type": "tri_state",+ "description": "Latch 7 bus-driving 3-state output that follows the latched data and goes high-impedance when OC is high."+ },+ {+ "number": "17",+ "name": "7D",+ "type": "input",+ "description": "Data input for latch 7; while C is high the Q output follows D, and the level present when C goes low is latched."+ },+ {+ "number": "18",+ "name": "8D",+ "type": "input",+ "description": "Data input for latch 8; while C is high the Q output follows D, and the level present when C goes low is latched."+ },+ {+ "number": "19",+ "name": "8Q",+ "type": "tri_state",+ "description": "Latch 8 bus-driving 3-state output that follows the latched data and goes high-impedance when OC is high."+ },+ {+ "number": "20",+ "name": "VCC",+ "type": "power_in",+ "description": "Supply voltage pin; the datasheet text provided does not state its numeric limits."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The DW top-view diagram on page 1 is garbled in the text extraction. The pin-by-pin mapping was reco; The supplied pages give no numeric supply voltage limits for VCC, so the description states only its"+ ],+ "pages_sent": 10,+ "cost_usd": 0.0773,+ "at": "2026-10-07T22:42:29"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/sn74ls374",+ "pages": 34,+ "sha256": "5d2c396010d2b304",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 20,+ "described": 20,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "sn74ls373dwr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 10.3,+ 12.8,+ 2.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "59a10b341e6972b31d81802a048060326da627d8b92dcf4263064f4f62ec808e",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "sn74ls373dwr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 10.3,+ 12.8,+ 2.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "97717a661a66e6aab31c819069c337c6592320b10d2c141c249c23e0c1f9e7eb",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}