← Commit history

orderable attributes: rebuild .lbr with adom-lbr 2.18.0 so MPN, MANUFACTURER and the distributor part numbers reach <technology> (DIGIKEY_PN 296-31854-2-ND, LCSC_PN C7742, MOUSER_PN 595-SN74LS165ADR). The published library carried no attributes at all, so a BOM had nothing to buy from. Distributor PNs matched on exact MPN AND corroborating manufacturer.

Ray ·9d8ad42c52 · ·parent 7ce8e4e
2 files changed +33−9
page.json+9−5
@@ -26,13 +26,17 @@       "model_3d_step": "sn74ls165adr.step",       "lbr": "sn74ls165adr.lbr"     },-    "distributor_links": {},+    "distributor_links": {+      "digikey": "296-31854-2-ND",+      "mouser": "595-SN74LS165ADR",+      "lcsc": "C7742"+    },     "pins": [       {         "number": "1",         "name": "SH/LD",         "type": "input",-        "description": "Shift/Load control. Low = parallel-load data at A-H into the register (asynchronous, overrides clock). High = enable serial shifting on CLK/CLK INH. Diode-clamped TTL input, R_eq ~13 kΩ nom."+        "description": "Shift/Load control. Low = parallel-load data at A-H into the register (asynchronous, overrides clock). High = enable serial shifting on CLK/CLK INH. Diode-clamped TTL input, R_eq ~13 k\u03a9 nom."       },       {         "number": "2",@@ -44,7 +48,7 @@         "number": "3",         "name": "E",         "type": "input",-        "description": "Parallel data input for bit E of the 8-bit word. Loaded into the corresponding stage when SH/LD is low. TTL input, R_eq ~24 kΩ nom."+        "description": "Parallel data input for bit E of the 8-bit word. Loaded into the corresponding stage when SH/LD is low. TTL input, R_eq ~24 k\u03a9 nom."       },       {         "number": "4",@@ -68,7 +72,7 @@         "number": "7",         "name": "QH_N",         "type": "output",-        "description": "Complementary serial output (inverted QH). Provides the inverse of the eighth-stage register bit. Totem-pole TTL output, IOH = -800 μA, IOL = 16 mA, V_OL ≤ 0.4 V."+        "description": "Complementary serial output (inverted QH). Provides the inverse of the eighth-stage register bit. Totem-pole TTL output, IOH = -800 \u03bcA, IOL = 16 mA, V_OL \u2264 0.4 V."       },       {         "number": "8",@@ -122,7 +126,7 @@         "number": "16",         "name": "VCC",         "type": "power_in",-        "description": "Positive supply, 4.75 V to 5.25 V (SN74LS165A). Typical ICC ≈ 42 mA (max 63 mA); typical power dissipation 90 mW."+        "description": "Positive supply, 4.75 V to 5.25 V (SN74LS165A). Typical ICC \u2248 42 mA (max 63 mA); typical power dissipation 90 mW."       }     ],     "provenance": {
sn74ls165adr.lbr+24−4
@@ -70,6 +70,18 @@   <smd name="14" x="2.4750" y="1.9050" dx="1.9500" dy="0.6000" layer="1"/>   <smd name="15" x="2.4750" y="3.1750" dx="1.9500" dy="0.6000" layer="1"/>   <smd name="16" x="2.4750" y="4.4450" dx="1.9500" dy="0.6000" layer="1"/>+  <polygon width="0.1200" layer="21">+    <vertex x="-2.6000" y="5.0100"/>+    <vertex x="-2.8400" y="5.3400"/>+    <vertex x="-2.3600" y="5.3400"/>+  </polygon>+  <polygon width="0.1000" layer="51">+    <vertex x="-0.9750" y="4.9500"/>+    <vertex x="1.9500" y="4.9500"/>+    <vertex x="1.9500" y="-4.9500"/>+    <vertex x="-1.9500" y="-4.9500"/>+    <vertex x="-1.9500" y="3.9750"/>+  </polygon>   <wire x1="-2.0600" y1="5.0600" x2="2.0600" y2="5.0600" width="0.1200" layer="21"/>   <wire x1="-2.0600" y1="5.0050" x2="-2.0600" y2="5.0600" width="0.1200" layer="21"/>   <wire x1="-2.0600" y1="-5.0600" x2="-2.0600" y2="-5.0050" width="0.1200" layer="21"/>@@ -78,7 +90,7 @@   <wire x1="2.0600" y1="-5.0600" x2="-2.0600" y2="-5.0600" width="0.1200" layer="21"/>   <text x="0" y="6.020" size="1.27" layer="25" align="bottom-center">&gt;NAME</text>   <text x="0" y="-6.020" size="1.27" layer="27" align="top-center">&gt;VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-2.6000" y="5.0100"/><vertex x="-2.8400" y="5.3400"/><vertex x="-2.3600" y="5.3400"/></polygon></package>+</package> </packages> <symbols> <symbol name="SN74LS165ADR">@@ -97,7 +109,7 @@   <pin name="QH_N" x="-17.78" y="-7.62" length="middle" direction="out"/>   <pin name="GND" x="-17.78" y="-10.16" length="middle" direction="pwr"/>   <pin name="VCC" x="17.78" y="7.62" length="middle" direction="pwr" rot="R180"/>-  <pin name="CLK INH" x="17.78" y="5.08" length="middle" direction="in" rot="R180"/>+  <pin name="CLK_INH" x="17.78" y="5.08" length="middle" direction="in" rot="R180"/>   <pin name="D" x="17.78" y="2.54" length="middle" direction="in" rot="R180"/>   <pin name="C" x="17.78" y="0" length="middle" direction="in" rot="R180"/>   <pin name="B" x="17.78" y="-2.54" length="middle" direction="in" rot="R180"/>@@ -124,7 +136,7 @@         <connect gate="G$1" pin="QH_N" pad="7"/>         <connect gate="G$1" pin="GND" pad="8"/>         <connect gate="G$1" pin="VCC" pad="16"/>-        <connect gate="G$1" pin="CLK INH" pad="15"/>+        <connect gate="G$1" pin="CLK_INH" pad="15"/>         <connect gate="G$1" pin="D" pad="14"/>         <connect gate="G$1" pin="C" pad="13"/>         <connect gate="G$1" pin="B" pad="12"/>@@ -132,7 +144,15 @@         <connect gate="G$1" pin="SER" pad="10"/>         <connect gate="G$1" pin="QH" pad="9"/>       </connects>-      <technologies><technology name=""/></technologies>+      <technologies>+        <technology name="">+          <attribute name="MPN" value="SN74LS165ADR" constant="no"/>+          <attribute name="MANUFACTURER" value="Texas Instruments" constant="no"/>+          <attribute name="MOUSER_PN" value="595-SN74LS165ADR" constant="no"/>+          <attribute name="DIGIKEY_PN" value="296-31854-2-ND" constant="no"/>+          <attribute name="LCSC_PN" value="C7742" constant="no"/>+        </technology>+      </technologies>     </device>   </devices> </deviceset>