component
SN74LS164DR
Public Made by Adomby adom
Texas Instruments Shifting Register, SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+152−8@@ -1,13 +1,162 @@ {+ "schema_version": 1,+ "type": "component", "slug": "sn74ls164dr",+ "title": "SN74LS164DR",+ "brief": "Texas Instruments Shifting Register, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Texas Instruments Shifting Register, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "logic", "sn74ls164dr" ],+ "component": {+ "mpn": "SN74LS164DR",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-14",+ "pin_count": 14,+ "category": "Logic",+ "subcategory": "Shifting Register",+ "datasheet": "https://www.ti.com/lit/ds/symlink/sn74ls164.pdf",+ "parts": {+ "symbol": "sn74ls164dr.kicad_sym",+ "footprint": "sn74ls164dr.kicad_mod",+ "model_3d": "sn74ls164dr.glb",+ "model_3d_step": "sn74ls164dr.step",+ "lbr": "sn74ls164dr.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "A",+ "type": "input",+ "description": "Gated serial data input A. ANDed internally with serial input B to drive the first flip-flop's D input; either input held low inhibits new-data entry and forces the first stage low at the next clock edge. Diode-clamped LSTTL input, VIH >= 2 V, VIL <= 0.8 V."+ },+ {+ "number": "2",+ "name": "B",+ "type": "input",+ "description": "Gated serial data input B. ANDed internally with serial input A; a high level here enables input A to determine the next state of the first flip-flop. Diode-clamped LSTTL input."+ },+ {+ "number": "3",+ "name": "QA",+ "type": "output",+ "description": "Parallel output of shift-register stage A (first stage). Totem-pole LSTTL output, VOH >= 2.7 V @ IOH = -0.4 mA, VOL <= 0.5 V @ IOL = 8 mA."+ },+ {+ "number": "4",+ "name": "QB",+ "type": "output",+ "description": "Parallel output of shift-register stage B. Totem-pole LSTTL output."+ },+ {+ "number": "5",+ "name": "QC",+ "type": "output",+ "description": "Parallel output of shift-register stage C. Totem-pole LSTTL output."+ },+ {+ "number": "6",+ "name": "QD",+ "type": "output",+ "description": "Parallel output of shift-register stage D. Totem-pole LSTTL output."+ },+ {+ "number": "7",+ "name": "GND",+ "type": "power_in",+ "description": "Ground / 0 V reference for the device."+ },+ {+ "number": "8",+ "name": "CLK",+ "type": "input",+ "description": "Clock input. Data at the serial inputs is shifted one stage on the low-to-high transition; clock frequency 0-25 MHz (36 MHz typical). Minimum pulse width tw = 20 ns; setup 15 ns, hold 5 ns."+ },+ {+ "number": "9",+ "name": "CLR",+ "type": "input",+ "description": "Active-low asynchronous clear. Driving CLR low forces all Q outputs low independent of CLK; must be held high (with tsu(clear inactive) >= 20 ns before next clock edge) for normal shift operation."+ },+ {+ "number": "10",+ "name": "QE",+ "type": "output",+ "description": "Parallel output of shift-register stage E. Totem-pole LSTTL output."+ },+ {+ "number": "11",+ "name": "QF",+ "type": "output",+ "description": "Parallel output of shift-register stage F. Totem-pole LSTTL output."+ },+ {+ "number": "12",+ "name": "QG",+ "type": "output",+ "description": "Parallel output of shift-register stage G. Totem-pole LSTTL output."+ },+ {+ "number": "13",+ "name": "QH",+ "type": "output",+ "description": "Parallel output of shift-register stage H (last stage). Also functions as the serial output when cascading devices. Totem-pole LSTTL output."+ },+ {+ "number": "14",+ "name": "VCC",+ "type": "power_in",+ "description": "Positive supply, 4.75 V to 5.25 V (5 V nominal) for SN74LS164. Recommended bypass with 0.1 uF to GND close to the pin."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/sn74ls164.pdf",+ "pages": 25,+ "sha256": "a1ac7a9fe0ab2158",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 14,+ "described": 14,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Texas Instruments",+ "Package": "SOIC-14",+ "Category": "Logic",+ "Pins": "14"+ }+ },+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "sn74ls164dr"+ ],+ "discovery_pitch": "SN74LS164DR (Texas Instruments) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +174,5 @@ "docs/sn74ls164dr-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }