SN74HCT244PWR

@@ -26,25 +26,28 @@       "model_3d_step": "sn74hct244pwr.step",       "lbr": "sn74hct244pwr.lbr"     },-    "distributor_links": {},+    "distributor_links": {+      "digikey": "296-8402-2-ND",+      "lcsc": "C6778"+    },     "pins": [       {         "number": "1",         "name": "1OE",         "type": "input",-        "description": "Active-low output enable for bank 1 (buffers 1A1-1A4 → 1Y1-1Y4). When low, bank 1 outputs pass the A input data. When high, bank 1 outputs are placed in the high-impedance state. Must be tied to VCC through a pull-up for high-Z during power up/down."+        "description": "Active-low output enable for bank 1 (buffers 1A1-1A4 \u2192 1Y1-1Y4). When low, bank 1 outputs pass the A input data. When high, bank 1 outputs are placed in the high-impedance state. Must be tied to VCC through a pull-up for high-Z during power up/down."       },       {         "number": "2",         "name": "1A1",         "type": "input",-        "description": "Bank 1 buffer input 1. TTL-compatible CMOS input; buffered non-inverting to 1Y1 when 1OE is low. VIH ≥ 2 V, VIL ≤ 0.8 V at VCC = 4.5-5.5 V; input current ≤ ±1 µA."+        "description": "Bank 1 buffer input 1. TTL-compatible CMOS input; buffered non-inverting to 1Y1 when 1OE is low. VIH \u2265 2 V, VIL \u2264 0.8 V at VCC = 4.5-5.5 V; input current \u2264 \u00b11 \u00b5A."       },       {         "number": "3",         "name": "2Y4",         "type": "tri_state",-        "description": "Bank 2 buffer output 4. 3-state, non-inverting output driven by 2A4 when 2OE is low; high-impedance when 2OE is high. ±6 mA output drive at 5 V."+        "description": "Bank 2 buffer output 4. 3-state, non-inverting output driven by 2A4 when 2OE is low; high-impedance when 2OE is high. \u00b16 mA output drive at 5 V."       },       {         "number": "4",@@ -140,13 +143,13 @@         "number": "19",         "name": "2OE",         "type": "input",-        "description": "Active-low output enable for bank 2 (buffers 2A1-2A4 → 2Y1-2Y4). When low, bank 2 outputs pass the A input data. When high, bank 2 outputs are placed in the high-impedance state."+        "description": "Active-low output enable for bank 2 (buffers 2A1-2A4 \u2192 2Y1-2Y4). When low, bank 2 outputs pass the A input data. When high, bank 2 outputs are placed in the high-impedance state."       },       {         "number": "20",         "name": "VCC",         "type": "power_in",-        "description": "Positive supply rail, 4.5 V to 5.5 V (recommended). Absolute max 7 V. Decouple locally to GND with a 0.1 µF ceramic capacitor."+        "description": "Positive supply rail, 4.5 V to 5.5 V (recommended). Absolute max 7 V. Decouple locally to GND with a 0.1 \u00b5F ceramic capacitor."       }     ],     "provenance": {

@@ -74,11 +74,23 @@   <smd name="18" x="2.8625" y="1.6250" dx="1.4750" dy="0.4000" layer="1"/>   <smd name="19" x="2.8625" y="2.2750" dx="1.4750" dy="0.4000" layer="1"/>   <smd name="20" x="2.8625" y="2.9250" dx="1.4750" dy="0.4000" layer="1"/>+  <polygon width="0.1200" layer="21">+    <vertex x="-3.8600" y="2.9300"/>+    <vertex x="-4.1900" y="2.6900"/>+    <vertex x="-4.1900" y="3.1700"/>+  </polygon>+  <polygon width="0.1000" layer="51">+    <vertex x="-1.2000" y="3.2500"/>+    <vertex x="2.2000" y="3.2500"/>+    <vertex x="2.2000" y="-3.2500"/>+    <vertex x="-2.2000" y="-3.2500"/>+    <vertex x="-2.2000" y="2.2500"/>+  </polygon>   <wire x1="-2.3100" y1="3.3850" x2="2.3100" y2="3.3850" width="0.1200" layer="21"/>   <wire x1="2.3100" y1="-3.3850" x2="-2.3100" y2="-3.3850" width="0.1200" layer="21"/>   <text x="0" y="4.262" size="1.27" layer="25" align="bottom-center">&gt;NAME</text>   <text x="0" y="-4.262" size="1.27" layer="27" align="top-center">&gt;VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-3.8600" y="2.9300"/><vertex x="-4.1900" y="2.6900"/><vertex x="-4.1900" y="3.1700"/></polygon></package>+</package> </packages> <symbols> <symbol name="SN74HCT244PWR">@@ -140,7 +152,14 @@         <connect gate="G$1" pin="1Y4" pad="12"/>         <connect gate="G$1" pin="2A1" pad="11"/>       </connects>-      <technologies><technology name=""/></technologies>+      <technologies>+        <technology name="">+          <attribute name="MPN" value="SN74HCT244PWR" constant="no"/>+          <attribute name="MANUFACTURER" value="Texas Instruments" constant="no"/>+          <attribute name="DIGIKEY_PN" value="296-8402-2-ND" constant="no"/>+          <attribute name="LCSC_PN" value="C6778" constant="no"/>+        </technology>+      </technologies>     </device>   </devices> </deviceset>