component
SN74HCT244PWR
Public Made by Adomby adom
Texas Instruments Buffer/Driver/Transceiver, TSSOP-20. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+188−8@@ -1,13 +1,198 @@ {+ "schema_version": 1,+ "type": "component", "slug": "sn74hct244pwr",+ "title": "SN74HCT244PWR",+ "brief": "Texas Instruments Buffer/Driver/Transceiver, TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Texas Instruments Buffer/Driver/Transceiver, TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "logic", "sn74hct244pwr" ],+ "component": {+ "mpn": "SN74HCT244PWR",+ "manufacturer": "Texas Instruments",+ "package": "TSSOP-20",+ "pin_count": 20,+ "category": "Logic",+ "subcategory": "Buffer/Driver/Transceiver",+ "datasheet": "https://www.ti.com/lit/ds/symlink/sn74hct244.pdf",+ "parts": {+ "symbol": "sn74hct244pwr.kicad_sym",+ "footprint": "sn74hct244pwr.kicad_mod",+ "model_3d": "sn74hct244pwr.glb",+ "model_3d_step": "sn74hct244pwr.step",+ "lbr": "sn74hct244pwr.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "1OE",+ "type": "input",+ "description": "Active-low output enable for bank 1 (buffers 1A1-1A4 \u2192 1Y1-1Y4). When low, bank 1 outputs pass the A input data. When high, bank 1 outputs are placed in the high-impedance state. Must be tied to VCC through a pull-up for high-Z during power up/down."+ },+ {+ "number": "2",+ "name": "1A1",+ "type": "input",+ "description": "Bank 1 buffer input 1. TTL-compatible CMOS input; buffered non-inverting to 1Y1 when 1OE is low. VIH \u2265 2 V, VIL \u2264 0.8 V at VCC = 4.5-5.5 V; input current \u2264 \u00b11 \u00b5A."+ },+ {+ "number": "3",+ "name": "2Y4",+ "type": "tri_state",+ "description": "Bank 2 buffer output 4. 3-state, non-inverting output driven by 2A4 when 2OE is low; high-impedance when 2OE is high. \u00b16 mA output drive at 5 V."+ },+ {+ "number": "4",+ "name": "1A2",+ "type": "input",+ "description": "Bank 1 buffer input 2. TTL-compatible CMOS input; buffered non-inverting to 1Y2 when 1OE is low."+ },+ {+ "number": "5",+ "name": "2Y3",+ "type": "tri_state",+ "description": "Bank 2 buffer output 3. 3-state, non-inverting output driven by 2A3 when 2OE is low; high-impedance when 2OE is high."+ },+ {+ "number": "6",+ "name": "1A3",+ "type": "input",+ "description": "Bank 1 buffer input 3. TTL-compatible CMOS input; buffered non-inverting to 1Y3 when 1OE is low."+ },+ {+ "number": "7",+ "name": "2Y2",+ "type": "tri_state",+ "description": "Bank 2 buffer output 2. 3-state, non-inverting output driven by 2A2 when 2OE is low; high-impedance when 2OE is high."+ },+ {+ "number": "8",+ "name": "1A4",+ "type": "input",+ "description": "Bank 1 buffer input 4. TTL-compatible CMOS input; buffered non-inverting to 1Y4 when 1OE is low."+ },+ {+ "number": "9",+ "name": "2Y1",+ "type": "tri_state",+ "description": "Bank 2 buffer output 1. 3-state, non-inverting output driven by 2A1 when 2OE is low; high-impedance when 2OE is high."+ },+ {+ "number": "10",+ "name": "GND",+ "type": "power_in",+ "description": "Device ground reference (0 V)."+ },+ {+ "number": "11",+ "name": "2A1",+ "type": "input",+ "description": "Bank 2 buffer input 1. TTL-compatible CMOS input; buffered non-inverting to 2Y1 when 2OE is low."+ },+ {+ "number": "12",+ "name": "1Y4",+ "type": "tri_state",+ "description": "Bank 1 buffer output 4. 3-state, non-inverting output driven by 1A4 when 1OE is low; high-impedance when 1OE is high."+ },+ {+ "number": "13",+ "name": "2A2",+ "type": "input",+ "description": "Bank 2 buffer input 2. TTL-compatible CMOS input; buffered non-inverting to 2Y2 when 2OE is low."+ },+ {+ "number": "14",+ "name": "1Y3",+ "type": "tri_state",+ "description": "Bank 1 buffer output 3. 3-state, non-inverting output driven by 1A3 when 1OE is low; high-impedance when 1OE is high."+ },+ {+ "number": "15",+ "name": "2A3",+ "type": "input",+ "description": "Bank 2 buffer input 3. TTL-compatible CMOS input; buffered non-inverting to 2Y3 when 2OE is low."+ },+ {+ "number": "16",+ "name": "1Y2",+ "type": "tri_state",+ "description": "Bank 1 buffer output 2. 3-state, non-inverting output driven by 1A2 when 1OE is low; high-impedance when 1OE is high."+ },+ {+ "number": "17",+ "name": "2A4",+ "type": "input",+ "description": "Bank 2 buffer input 4. TTL-compatible CMOS input; buffered non-inverting to 2Y4 when 2OE is low."+ },+ {+ "number": "18",+ "name": "1Y1",+ "type": "tri_state",+ "description": "Bank 1 buffer output 1. 3-state, non-inverting output driven by 1A1 when 1OE is low; high-impedance when 1OE is high."+ },+ {+ "number": "19",+ "name": "2OE",+ "type": "input",+ "description": "Active-low output enable for bank 2 (buffers 2A1-2A4 \u2192 2Y1-2Y4). When low, bank 2 outputs pass the A input data. When high, bank 2 outputs are placed in the high-impedance state."+ },+ {+ "number": "20",+ "name": "VCC",+ "type": "power_in",+ "description": "Positive supply rail, 4.5 V to 5.5 V (recommended). Absolute max 7 V. Decouple locally to GND with a 0.1 \u00b5F ceramic capacitor."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/sn74hct244.pdf",+ "pages": 38,+ "sha256": "5d3df17f40ffa6fd",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 20,+ "described": 20,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Texas Instruments",+ "Package": "TSSOP-20",+ "Category": "Logic",+ "Pins": "20"+ }+ },+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "sn74hct244pwr"+ ],+ "discovery_pitch": "SN74HCT244PWR (Texas Instruments) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +210,5 @@ "docs/sn74hct244pwr-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }