component
SN74HC688PWR
Public Made by Adomby adom
Texas Instruments Comparators, TSSOP-20. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+230−8@@ -1,13 +1,240 @@ {+ "schema_version": 1,+ "type": "component", "slug": "sn74hc688pwr",+ "title": "SN74HC688PWR",+ "brief": "Texas Instruments Comparators, TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Texas Instruments Comparators, TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "op-amp-cmp", "sn74hc688pwr" ],+ "component": {+ "mpn": "SN74HC688PWR",+ "manufacturer": "Texas Instruments",+ "package": "TSSOP-20",+ "pin_count": 20,+ "category": "Op-amp/Cmp",+ "subcategory": "Comparators",+ "datasheet": "https://www.ti.com/lit/ds/symlink/sn74hc688.pdf",+ "parts": {+ "symbol": "sn74hc688pwr.kicad_sym",+ "footprint": "sn74hc688pwr.kicad_mod",+ "model_3d": "sn74hc688pwr.glb",+ "model_3d_step": "sn74hc688pwr.step",+ "lbr": "sn74hc688pwr.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "OE",+ "type": "input",+ "description": "Active-low output enable. When held high, the P=Q output is forced to the high level regardless of the data inputs; when held low, the comparator output reflects the P vs Q comparison."+ },+ {+ "number": "2",+ "name": "P0",+ "type": "input",+ "description": "Bit 0 of the P input word. Compared against Q0 by an internal XNOR stage; must be driven to a valid CMOS level (VIH/VIL per Recommended Operating Conditions)."+ },+ {+ "number": "3",+ "name": "Q0",+ "type": "input",+ "description": "Bit 0 of the Q input word. Compared against P0 by an internal XNOR stage."+ },+ {+ "number": "4",+ "name": "P1",+ "type": "input",+ "description": "Bit 1 of the P input word. Compared against Q1."+ },+ {+ "number": "5",+ "name": "Q1",+ "type": "input",+ "description": "Bit 1 of the Q input word. Compared against P1."+ },+ {+ "number": "6",+ "name": "P2",+ "type": "input",+ "description": "Bit 2 of the P input word. Compared against Q2."+ },+ {+ "number": "7",+ "name": "Q2",+ "type": "input",+ "description": "Bit 2 of the Q input word. Compared against P2."+ },+ {+ "number": "8",+ "name": "P3",+ "type": "input",+ "description": "Bit 3 of the P input word. Compared against Q3."+ },+ {+ "number": "9",+ "name": "Q3",+ "type": "input",+ "description": "Bit 3 of the Q input word. Compared against P3."+ },+ {+ "number": "10",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference (0 V). Return path for VCC supply current and logic input/output reference."+ },+ {+ "number": "11",+ "name": "P4",+ "type": "input",+ "description": "Bit 4 of the P input word. Compared against Q4."+ },+ {+ "number": "12",+ "name": "Q4",+ "type": "input",+ "description": "Bit 4 of the Q input word. Compared against P4."+ },+ {+ "number": "13",+ "name": "P5",+ "type": "input",+ "description": "Bit 5 of the P input word. Compared against Q5."+ },+ {+ "number": "14",+ "name": "Q5",+ "type": "input",+ "description": "Bit 5 of the Q input word. Compared against P5."+ },+ {+ "number": "15",+ "name": "P6",+ "type": "input",+ "description": "Bit 6 of the P input word. Compared against Q6."+ },+ {+ "number": "16",+ "name": "Q6",+ "type": "input",+ "description": "Bit 6 of the Q input word. Compared against P6."+ },+ {+ "number": "17",+ "name": "P7",+ "type": "input",+ "description": "Bit 7 (MSB) of the P input word. Compared against Q7."+ },+ {+ "number": "18",+ "name": "Q7",+ "type": "input",+ "description": "Bit 7 (MSB) of the Q input word. Compared against P7."+ },+ {+ "number": "19",+ "name": "P=Q",+ "type": "output",+ "description": "Active-low equality output. Drives low when all eight P bits equal the corresponding Q bits and OE is low; drives high otherwise or whenever OE is high. Rated for \u00b14 mA drive at 5 V (up to 10 LSTTL loads)."+ },+ {+ "number": "20",+ "name": "VCC",+ "type": "power_in",+ "description": "Positive supply voltage, 2 V to 6 V (5 V nominal). A 0.1-\u00b5F bypass capacitor placed close to this pin is recommended; paralleling with a 1-\u00b5F cap is common."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/sn74hc688.pdf",+ "pages": 24,+ "sha256": "d600a33f4ebb7089",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 20,+ "described": 20,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Texas Instruments",+ "Package": "TSSOP-20",+ "Category": "Op-amp/Cmp",+ "Pins": "20"+ }+ },+ "variants": [+ {+ "mpn": "SN74HC688PWR",+ "kind": "packaging"+ },+ {+ "mpn": "SN74HC688PWRE4",+ "kind": "packaging"+ },+ {+ "mpn": "SN74HC688PWRPWT",+ "kind": "packaging"+ },+ {+ "mpn": "SN74HC688PWRDW",+ "kind": "packaging"+ },+ {+ "mpn": "SN74HC688PWRDWR",+ "kind": "packaging"+ },+ {+ "mpn": "SN74HC688PWRDWRE4",+ "kind": "packaging"+ },+ {+ "mpn": "SN74HC688PWRDWRG4",+ "kind": "packaging"+ },+ {+ "mpn": "SN74HC688PWRN",+ "kind": "packaging"+ },+ {+ "mpn": "SN74HC688PWRJ",+ "kind": "packaging"+ },+ {+ "mpn": "SN74HC688PWRFK",+ "kind": "packaging"+ }+ ],+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "sn74hc688pwr"+ ],+ "discovery_pitch": "SN74HC688PWR (Texas Instruments) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +252,5 @@ "docs/sn74hc688pwr-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }