component
SN74HC595
Public Made by Adomby adom
TI 8-bit serial-in parallel-out shift register, SOIC-16. 2-6 V, 3-state outputs, serial cascade out. Datasheet-verified.
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component: full datasheet-first definition (pins, specs, CAD, provenance)
1 file changed
+163−8
page.json+163−8@@ -1,8 +1,11 @@ {+ "schema_version": 1,+ "type": "component", "slug": "sn74hc595",+ "title": "SN74HC595",+ "brief": "TI 8-bit serial-in parallel-out shift register, SOIC-16. 2-6 V, 3-state outputs, serial cascade out. Datasheet-verified.", "version": "0.1.0",- "type": "component",- "description": "TI 8-bit serial-in parallel-out shift register, SOIC-16. 2-6 V, 3-state outputs, serial cascade out. Datasheet-verified.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "logic",@@ -11,6 +14,163 @@ "soic-16", "texas-instruments" ],+ "component": {+ "mpn": "SN74HC595",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-16",+ "pin_count": 16,+ "category": "Logic IC",+ "subcategory": "Shift register",+ "datasheet": "https://www.ti.com/lit/ds/symlink/sn74hc595.pdf",+ "parts": {+ "symbol": "sn74hc595.kicad_sym",+ "footprint": "sn74hc595.kicad_mod",+ "model_3d": "sn74hc595.glb"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "QB",+ "type": "tri_state",+ "description": "Parallel 3-state output bit B from the 8-bit storage register. Drives up to 15 LSTTL loads (\u00b16 mA typical at VCC = 4.5 V). Placed in high-impedance when OE is high."+ },+ {+ "number": "2",+ "name": "QC",+ "type": "tri_state",+ "description": "Parallel 3-state output bit C from the 8-bit storage register. Placed in high-impedance when OE is high."+ },+ {+ "number": "3",+ "name": "QD",+ "type": "tri_state",+ "description": "Parallel 3-state output bit D from the 8-bit storage register. Placed in high-impedance when OE is high."+ },+ {+ "number": "4",+ "name": "QE",+ "type": "tri_state",+ "description": "Parallel 3-state output bit E from the 8-bit storage register. Placed in high-impedance when OE is high."+ },+ {+ "number": "5",+ "name": "QF",+ "type": "tri_state",+ "description": "Parallel 3-state output bit F from the 8-bit storage register. Placed in high-impedance when OE is high."+ },+ {+ "number": "6",+ "name": "QG",+ "type": "tri_state",+ "description": "Parallel 3-state output bit G from the 8-bit storage register. Placed in high-impedance when OE is high."+ },+ {+ "number": "7",+ "name": "QH",+ "type": "tri_state",+ "description": "Parallel 3-state output bit H from the 8-bit storage register. Placed in high-impedance when OE is high."+ },+ {+ "number": "8",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference (0 V) for the device."+ },+ {+ "number": "9",+ "name": "QH'",+ "type": "output",+ "description": "Serial data output from the internal shift register (taken from the last shift stage, QH). Used for cascading multiple SN74HC595 devices. Not affected by OE (always driven)."+ },+ {+ "number": "10",+ "name": "SRCLR",+ "type": "input",+ "description": "Active-low shift-register clear. When low, asynchronously clears the 8-bit shift register; does not clear the storage register."+ },+ {+ "number": "11",+ "name": "SRCLK",+ "type": "input",+ "description": "Shift-register clock input. On the rising edge, data at SER is shifted one position through QA'..QH' of the shift register."+ },+ {+ "number": "12",+ "name": "RCLK",+ "type": "input",+ "description": "Storage-register (latch) clock input. On the rising edge, the shift-register contents are transferred in parallel to the storage register, updating outputs QA-QH."+ },+ {+ "number": "13",+ "name": "OE",+ "type": "input",+ "description": "Active-low output enable. When low, the QA-QH parallel outputs are driven; when high, they enter the high-impedance state. Does not affect the serial cascade output QH'."+ },+ {+ "number": "14",+ "name": "SER",+ "type": "input",+ "description": "Serial data input to the shift register. Sampled on the rising edge of SRCLK; shifted into stage A."+ },+ {+ "number": "15",+ "name": "QA",+ "type": "tri_state",+ "description": "Parallel 3-state output bit A from the 8-bit storage register. Placed in high-impedance when OE is high."+ },+ {+ "number": "16",+ "name": "VCC",+ "type": "power_in",+ "description": "Positive supply, 2 V to 6 V (recommended). Absolute maximum 7 V."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/sn74hc595.pdf",+ "pages": 41,+ "sha256": "215816945704e561",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Type": "8-bit shift register (SIPO)",+ "Logic family": "HC (high-speed CMOS)",+ "Supply voltage (VCC)": "2-6 V (7 V abs max)",+ "Outputs": "8 parallel 3-state (QA-QH) + serial QH'",+ "Output drive": "\u00b16 mA per output",+ "Clocking": "Separate SRCLK (shift) + RCLK (latch)",+ "Reset": "Direct SRCLR (active low), OE tri-state",+ "Package": "SOIC-16",+ "Body (L\u00d7W\u00d7H)": "9.9 \u00d7 3.9 \u00d7 1.75 mm"+ }+ },+ "discovery_triggers": [+ "sn74hc595",+ "74hc595",+ "8-bit shift register",+ "serial to parallel"+ ],+ "discovery_pitch": "SN74HC595 8-bit serial-in parallel-out shift register (SOIC-16) with datasheet-verified pinout, KiCad symbol/footprint/3D, and full provenance.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -26,10 +186,5 @@ "docs/sn74hc595-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }