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Initial commit: component/sn74hc574pw

Ray ·98958443cb ·
2 files changed +97
README.mdadded+63
@@ -0,0 +1,63 @@+# SN74HC574PW++**lingxingic SN74HC574PW LX** · Flip Flops · TSSOP-20++SN74HC574PW from lingxingic SN74HC574PW LX, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | /OE | input | 3-state output enable, active low. When /OE = L the Q outputs are driven from the internal latch; when /OE = H all Q outputs enter high-impedance (Z). Does not affect the state of the internal latches. |+| 2 | D0 | input | Data input bit 0. Latched into internal flip-flop FF1 on the rising edge of CP; setup/hold timing per 3.3 electrical characteristics. |+| 3 | D1 | input | Data input bit 1. Latched into internal flip-flop FF2 on the rising edge of CP. |+| 4 | D2 | input | Data input bit 2. Latched into internal flip-flop FF3 on the rising edge of CP. |+| 5 | D3 | input | Data input bit 3. Latched into internal flip-flop FF4 on the rising edge of CP. |+| 6 | D4 | input | Data input bit 4. Latched into internal flip-flop FF5 on the rising edge of CP. |+| 7 | D5 | input | Data input bit 5. Latched into internal flip-flop FF6 on the rising edge of CP. |+| 8 | D6 | input | Data input bit 6. Latched into internal flip-flop FF7 on the rising edge of CP. |+| 9 | D7 | input | Data input bit 7. Latched into internal flip-flop FF8 on the rising edge of CP. |+| 10 | GND | power_in | Ground reference (0 V). Return path for VCC. |+| 11 | CP | input | Clock input, positive edge-triggered. All eight Dn inputs are transferred to the internal latches on the L->H transition of CP. |+| 12 | Q7 | tri_state | 3-state flip-flop output bit 7 (from FF8). Driven when /OE = L; Hi-Z when /OE = H. |+| 13 | Q6 | tri_state | 3-state flip-flop output bit 6 (from FF7). Driven when /OE = L; Hi-Z when /OE = H. |+| 14 | Q5 | tri_state | 3-state flip-flop output bit 5 (from FF6). Driven when /OE = L; Hi-Z when /OE = H. |+| 15 | Q4 | tri_state | 3-state flip-flop output bit 4 (from FF5). Driven when /OE = L; Hi-Z when /OE = H. |+| 16 | Q3 | tri_state | 3-state flip-flop output bit 3 (from FF4). Driven when /OE = L; Hi-Z when /OE = H. |+| 17 | Q2 | tri_state | 3-state flip-flop output bit 2 (from FF3). Driven when /OE = L; Hi-Z when /OE = H. |+| 18 | Q1 | tri_state | 3-state flip-flop output bit 1 (from FF2). Driven when /OE = L; Hi-Z when /OE = H. |+| 19 | Q0 | tri_state | 3-state flip-flop output bit 0 (from FF1). Driven when /OE = L; Hi-Z when /OE = H. |+| 20 | VCC | power_in | Positive supply. SN74HC574: 2.0-6.0 V (CMOS levels). SN74HCT574: 4.5-5.5 V (TTL-compatible input levels). Decouple to GND with 0.1 uF close to the pin. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | lingxingic SN74HC574PW LX |+| Package | TSSOP-20 |+| Category | Logic |+| Pins | 20 |++## Ordering variants++- `SN74HC574PWPW`+- `SN74HC574PWN`+- `SN74HC574PWD`+- `SN74HC574PWNSR`++## CAD (KiCad official)++- Symbol: `SN74HC574PW`+- Footprint: `Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm`+- 3D model: TSSOP-20 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [lingxingic SN74HC574PW LX datasheet](docs/sn74hc574pw-datasheet.pdf) (20 pp, sha256 `4513b7374c86e098`, retrieved 2026-08-17, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn74hc574pw-datasheet.pdf)
page.jsonadded+34
@@ -0,0 +1,34 @@+{+  "slug": "sn74hc574pw",+  "version": "0.1.0",+  "type": "component",+  "description": "lingxingic SN74HC574PW LX Flip Flops, TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "logic",+    "sn74hc574pw"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "sn74hc574pw.kicad_sym",+    "sn74hc574pw.kicad_mod",+    "sn74hc574pw.glb",+    "sn74hc574pw.step",+    "sn74hc574pw.lbr",+    "docs/hero.png",+    "docs/sn74hc574pw-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file