component
SN74HC377DWR
Public Made by Adomby adom
Texas Instruments Flip Flops, SOIC-20-300mil. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+188−8@@ -1,13 +1,198 @@ {+ "schema_version": 1,+ "type": "component", "slug": "sn74hc377dwr",+ "title": "SN74HC377DWR",+ "brief": "Texas Instruments Flip Flops, SOIC-20-300mil. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Texas Instruments Flip Flops, SOIC-20-300mil. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "logic", "sn74hc377dwr" ],+ "component": {+ "mpn": "SN74HC377DWR",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-20-300mil",+ "pin_count": 20,+ "category": "Logic",+ "subcategory": "Flip Flops",+ "datasheet": "https://www.ti.com/lit/ds/symlink/sn74hc377dwr.pdf",+ "parts": {+ "symbol": "sn74hc377dwr.kicad_sym",+ "footprint": "sn74hc377dwr.kicad_mod",+ "model_3d": "sn74hc377dwr.glb",+ "model_3d_step": "sn74hc377dwr.step",+ "lbr": "sn74hc377dwr.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "CLKEN",+ "type": "input",+ "description": "Active-low latched clock enable. When CLKEN is low, the rising edge of CLK transfers D-input data to the Q outputs; when CLKEN is high, outputs hold their previous state. Input structure prevents false clocking from CLKEN transitions."+ },+ {+ "number": "2",+ "name": "1Q",+ "type": "output",+ "description": "Flip-flop 1 single-rail data output. Follows 1D on the rising edge of CLK when CLKEN is low. CMOS push-pull output rated \u00b14 mA at VCC = 5 V."+ },+ {+ "number": "3",+ "name": "1D",+ "type": "input",+ "description": "Flip-flop 1 data input. Sampled on the rising edge of CLK when CLKEN is low. High-impedance CMOS input (II = \u00b11 \u00b5A max)."+ },+ {+ "number": "4",+ "name": "2D",+ "type": "input",+ "description": "Flip-flop 2 data input. Sampled on the rising edge of CLK when CLKEN is low. High-impedance CMOS input (II = \u00b11 \u00b5A max)."+ },+ {+ "number": "5",+ "name": "2Q",+ "type": "output",+ "description": "Flip-flop 2 single-rail data output. Follows 2D on the rising edge of CLK when CLKEN is low. CMOS push-pull output rated \u00b14 mA at VCC = 5 V."+ },+ {+ "number": "6",+ "name": "3Q",+ "type": "output",+ "description": "Flip-flop 3 single-rail data output. Follows 3D on the rising edge of CLK when CLKEN is low. CMOS push-pull output rated \u00b14 mA at VCC = 5 V."+ },+ {+ "number": "7",+ "name": "3D",+ "type": "input",+ "description": "Flip-flop 3 data input. Sampled on the rising edge of CLK when CLKEN is low. High-impedance CMOS input (II = \u00b11 \u00b5A max)."+ },+ {+ "number": "8",+ "name": "4D",+ "type": "input",+ "description": "Flip-flop 4 data input. Sampled on the rising edge of CLK when CLKEN is low. High-impedance CMOS input (II = \u00b11 \u00b5A max)."+ },+ {+ "number": "9",+ "name": "4Q",+ "type": "output",+ "description": "Flip-flop 4 single-rail data output. Follows 4D on the rising edge of CLK when CLKEN is low. CMOS push-pull output rated \u00b14 mA at VCC = 5 V."+ },+ {+ "number": "10",+ "name": "GND",+ "type": "power_in",+ "description": "Device ground return. Tie to system 0 V. Continuous current through GND limited to \u00b150 mA (absolute max)."+ },+ {+ "number": "11",+ "name": "CLK",+ "type": "input",+ "description": "Clock input. Rising edge (positive-going) transfers D-input data to the Q outputs when CLKEN is low. Level-sensitive triggering at a specific voltage threshold, not related to CLK edge rate."+ },+ {+ "number": "12",+ "name": "5Q",+ "type": "output",+ "description": "Flip-flop 5 single-rail data output. Follows 5D on the rising edge of CLK when CLKEN is low. CMOS push-pull output rated \u00b14 mA at VCC = 5 V."+ },+ {+ "number": "13",+ "name": "5D",+ "type": "input",+ "description": "Flip-flop 5 data input. Sampled on the rising edge of CLK when CLKEN is low. High-impedance CMOS input (II = \u00b11 \u00b5A max)."+ },+ {+ "number": "14",+ "name": "6D",+ "type": "input",+ "description": "Flip-flop 6 data input. Sampled on the rising edge of CLK when CLKEN is low. High-impedance CMOS input (II = \u00b11 \u00b5A max)."+ },+ {+ "number": "15",+ "name": "6Q",+ "type": "output",+ "description": "Flip-flop 6 single-rail data output. Follows 6D on the rising edge of CLK when CLKEN is low. CMOS push-pull output rated \u00b14 mA at VCC = 5 V."+ },+ {+ "number": "16",+ "name": "7Q",+ "type": "output",+ "description": "Flip-flop 7 single-rail data output. Follows 7D on the rising edge of CLK when CLKEN is low. CMOS push-pull output rated \u00b14 mA at VCC = 5 V."+ },+ {+ "number": "17",+ "name": "7D",+ "type": "input",+ "description": "Flip-flop 7 data input. Sampled on the rising edge of CLK when CLKEN is low. High-impedance CMOS input (II = \u00b11 \u00b5A max)."+ },+ {+ "number": "18",+ "name": "8D",+ "type": "input",+ "description": "Flip-flop 8 data input. Sampled on the rising edge of CLK when CLKEN is low. High-impedance CMOS input (II = \u00b11 \u00b5A max)."+ },+ {+ "number": "19",+ "name": "8Q",+ "type": "output",+ "description": "Flip-flop 8 single-rail data output. Follows 8D on the rising edge of CLK when CLKEN is low. CMOS push-pull output rated \u00b14 mA at VCC = 5 V."+ },+ {+ "number": "20",+ "name": "VCC",+ "type": "power_in",+ "description": "Positive supply. Recommended operating range 2 V to 6 V; absolute maximum -0.5 V to 7 V. Typical ICC = 80 \u00b5A max (SN74HC377) at VI = VCC or 0."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/sn74hc377dwr.pdf",+ "pages": null,+ "sha256": "862938bee895ab54",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 20,+ "described": 20,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Texas Instruments",+ "Package": "SOIC-20-300mil",+ "Category": "Logic",+ "Pins": "20"+ }+ },+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "sn74hc377dwr"+ ],+ "discovery_pitch": "SN74HC377DWR (Texas Instruments) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +210,5 @@ "docs/sn74hc377dwr-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }