SN74HC365DR

@@ -0,0 +1,64 @@+# SN74HC365DR++**Texas Instruments** · Buffer/Driver/Transceiver · SOIC-16++SN74HC365DR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | OE1 | input | Active-low output-enable 1. When OE1 is low AND OE2 is low, all six Y outputs follow their A inputs. When OE1 is high, all outputs go to the high-impedance (3-state) state regardless of OE2. |+| 2 | A1 | input | Data input for buffer channel 1. Non-inverted; drives Y1 when both OE inputs are low. |+| 3 | Y1 | tri_state | 3-state buffered output for channel 1. Follows A1 when both OE pins are low; high-impedance otherwise. ±6-mA drive at VCC = 5 V. |+| 4 | A2 | input | Data input for buffer channel 2. Non-inverted; drives Y2 when both OE inputs are low. |+| 5 | Y2 | tri_state | 3-state buffered output for channel 2. Follows A2 when both OE pins are low; high-impedance otherwise. |+| 6 | A3 | input | Data input for buffer channel 3. Non-inverted; drives Y3 when both OE inputs are low. |+| 7 | Y3 | tri_state | 3-state buffered output for channel 3. Follows A3 when both OE pins are low; high-impedance otherwise. |+| 8 | GND | power_in | Ground reference (0 V). All logic thresholds and output-low levels are referenced to this pin. |+| 9 | Y4 | tri_state | 3-state buffered output for channel 4. Follows A4 when both OE pins are low; high-impedance otherwise. |+| 10 | A4 | input | Data input for buffer channel 4. Non-inverted; drives Y4 when both OE inputs are low. |+| 11 | Y5 | tri_state | 3-state buffered output for channel 5. Follows A5 when both OE pins are low; high-impedance otherwise. |+| 12 | A5 | input | Data input for buffer channel 5. Non-inverted; drives Y5 when both OE inputs are low. |+| 13 | Y6 | tri_state | 3-state buffered output for channel 6. Follows A6 when both OE pins are low; high-impedance otherwise. |+| 14 | A6 | input | Data input for buffer channel 6. Non-inverted; drives Y6 when both OE inputs are low. |+| 15 | OE2 | input | Active-low output-enable 2. When OE1 is low AND OE2 is low, all six Y outputs follow their A inputs. When OE2 is high, all outputs go to the high-impedance (3-state) state regardless of OE1. |+| 16 | VCC | power_in | Positive supply voltage. Recommended operating range 2 V to 6 V (nom 5 V). Decouple with a 0.1-µF (and optionally a parallel 1-µF) bypass capacitor placed as close to the pin as possible. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-16 |+| Category | Logic |+| Pins | 16 |++## Ordering variants++- `SN74HC365DRD`+- `SN74HC365DR`+- `SN74HC365DRN`+- `SN74HC365DRNS`+- `SN74HC365DRNSR`+- `SN74HC365DRPW`+- `SN74HC365DRPWR`+- `SN74HC365DRPWRG4`+- `SN74HC365DRJ`+- `SN74HC365DRFK`++## CAD (KiCad official)++- Symbol: `SN74HC365DR`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOIC-16 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn74hc365.pdf) (None pp, sha256 `9b6fbffaf30ff5dc`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn74hc365dr-datasheet.pdf)

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