component
SN74HC365DR
Public Made by Adomby adom
Texas Instruments Buffer/Driver/Transceiver, SOIC-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+164−8@@ -1,13 +1,174 @@ {+ "schema_version": 1,+ "type": "component", "slug": "sn74hc365dr",+ "title": "SN74HC365DR",+ "brief": "Texas Instruments Buffer/Driver/Transceiver, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Texas Instruments Buffer/Driver/Transceiver, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "logic", "sn74hc365dr" ],+ "component": {+ "mpn": "SN74HC365DR",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-16",+ "pin_count": 16,+ "category": "Logic",+ "subcategory": "Buffer/Driver/Transceiver",+ "datasheet": "https://www.ti.com/lit/ds/symlink/sn74hc365.pdf",+ "parts": {+ "symbol": "sn74hc365dr.kicad_sym",+ "footprint": "sn74hc365dr.kicad_mod",+ "model_3d": "sn74hc365dr.glb",+ "model_3d_step": "sn74hc365dr.step",+ "lbr": "sn74hc365dr.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "OE1",+ "type": "input",+ "description": "Active-low output-enable 1. When OE1 is low AND OE2 is low, all six Y outputs follow their A inputs. When OE1 is high, all outputs go to the high-impedance (3-state) state regardless of OE2."+ },+ {+ "number": "2",+ "name": "A1",+ "type": "input",+ "description": "Data input for buffer channel 1. Non-inverted; drives Y1 when both OE inputs are low."+ },+ {+ "number": "3",+ "name": "Y1",+ "type": "tri_state",+ "description": "3-state buffered output for channel 1. Follows A1 when both OE pins are low; high-impedance otherwise. \u00b16-mA drive at VCC = 5 V."+ },+ {+ "number": "4",+ "name": "A2",+ "type": "input",+ "description": "Data input for buffer channel 2. Non-inverted; drives Y2 when both OE inputs are low."+ },+ {+ "number": "5",+ "name": "Y2",+ "type": "tri_state",+ "description": "3-state buffered output for channel 2. Follows A2 when both OE pins are low; high-impedance otherwise."+ },+ {+ "number": "6",+ "name": "A3",+ "type": "input",+ "description": "Data input for buffer channel 3. Non-inverted; drives Y3 when both OE inputs are low."+ },+ {+ "number": "7",+ "name": "Y3",+ "type": "tri_state",+ "description": "3-state buffered output for channel 3. Follows A3 when both OE pins are low; high-impedance otherwise."+ },+ {+ "number": "8",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference (0 V). All logic thresholds and output-low levels are referenced to this pin."+ },+ {+ "number": "9",+ "name": "Y4",+ "type": "tri_state",+ "description": "3-state buffered output for channel 4. Follows A4 when both OE pins are low; high-impedance otherwise."+ },+ {+ "number": "10",+ "name": "A4",+ "type": "input",+ "description": "Data input for buffer channel 4. Non-inverted; drives Y4 when both OE inputs are low."+ },+ {+ "number": "11",+ "name": "Y5",+ "type": "tri_state",+ "description": "3-state buffered output for channel 5. Follows A5 when both OE pins are low; high-impedance otherwise."+ },+ {+ "number": "12",+ "name": "A5",+ "type": "input",+ "description": "Data input for buffer channel 5. Non-inverted; drives Y5 when both OE inputs are low."+ },+ {+ "number": "13",+ "name": "Y6",+ "type": "tri_state",+ "description": "3-state buffered output for channel 6. Follows A6 when both OE pins are low; high-impedance otherwise."+ },+ {+ "number": "14",+ "name": "A6",+ "type": "input",+ "description": "Data input for buffer channel 6. Non-inverted; drives Y6 when both OE inputs are low."+ },+ {+ "number": "15",+ "name": "OE2",+ "type": "input",+ "description": "Active-low output-enable 2. When OE1 is low AND OE2 is low, all six Y outputs follow their A inputs. When OE2 is high, all outputs go to the high-impedance (3-state) state regardless of OE1."+ },+ {+ "number": "16",+ "name": "VCC",+ "type": "power_in",+ "description": "Positive supply voltage. Recommended operating range 2 V to 6 V (nom 5 V). Decouple with a 0.1-\u00b5F (and optionally a parallel 1-\u00b5F) bypass capacitor placed as close to the pin as possible."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/sn74hc365.pdf",+ "pages": null,+ "sha256": "9b6fbffaf30ff5dc",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Texas Instruments",+ "Package": "SOIC-16",+ "Category": "Logic",+ "Pins": "16"+ }+ },+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "sn74hc365dr"+ ],+ "discovery_pitch": "SN74HC365DR (Texas Instruments) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +186,5 @@ "docs/sn74hc365dr-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }