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CAD + datasheet

Ray ·e598b72da2 · ·parent 9505152
1 file changed +155−8
page.json+155−8
@@ -1,8 +1,11 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "sn74hc32",+  "title": "SN74HC32 Quad OR Gate",+  "brief": "Quad 2-input OR gate in the 74HC CMOS family.",   "version": "0.1.0",-  "type": "component",-  "description": "Quad 2-input OR gate in the 74HC CMOS family.",+  "license": "CC-BY-SA-4.0",   "tags": [     "logic",     "or-gate",@@ -11,6 +14,155 @@     "ti",     "soic-14"   ],+  "component": {+    "mpn": "SN74HC32",+    "manufacturer": "Texas Instruments",+    "package": "SOIC-14",+    "pin_count": 14,+    "category": "Logic",+    "subcategory": "Logic Gate",+    "datasheet": "https://www.ti.com/lit/ds/symlink/sn74hc32.pdf",+    "parts": {+      "symbol": "sn74hc32.kicad_sym",+      "footprint": "sn74hc32.kicad_mod",+      "model_3d": "sn74hc32.glb"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "1A",+        "type": "input",+        "description": "Channel 1, Input A. Logic input for the first 2-input OR gate. VIH >= 4.2 V and VIL <= 1.8 V at VCC = 6 V."+      },+      {+        "number": "2",+        "name": "1B",+        "type": "input",+        "description": "Channel 1, Input B. Second logic input for OR gate 1. Buffered CMOS input; VIH/VIL scale with VCC per Recommended Operating Conditions."+      },+      {+        "number": "3",+        "name": "1Y",+        "type": "output",+        "description": "Channel 1, Output Y. 1Y = 1A + 1B. Drives up to 10 LSTTL loads; VOH >= 5.48 V and VOL <= 0.33 V at VCC = 6 V."+      },+      {+        "number": "4",+        "name": "2A",+        "type": "input",+        "description": "Channel 2, Input A. Logic input for the second 2-input OR gate."+      },+      {+        "number": "5",+        "name": "2B",+        "type": "input",+        "description": "Channel 2, Input B. Second logic input for OR gate 2."+      },+      {+        "number": "6",+        "name": "2Y",+        "type": "output",+        "description": "Channel 2, Output Y. 2Y = 2A + 2B."+      },+      {+        "number": "7",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference (0 V) for the device. Connect to system ground with a low-inductance return."+      },+      {+        "number": "8",+        "name": "3Y",+        "type": "output",+        "description": "Channel 3, Output Y. 3Y = 3A + 3B."+      },+      {+        "number": "9",+        "name": "3A",+        "type": "input",+        "description": "Channel 3, Input A. Logic input for the third 2-input OR gate."+      },+      {+        "number": "10",+        "name": "3B",+        "type": "input",+        "description": "Channel 3, Input B. Second logic input for OR gate 3."+      },+      {+        "number": "11",+        "name": "4Y",+        "type": "output",+        "description": "Channel 4, Output Y. 4Y = 4A + 4B."+      },+      {+        "number": "12",+        "name": "4A",+        "type": "input",+        "description": "Channel 4, Input A. Logic input for the fourth 2-input OR gate."+      },+      {+        "number": "13",+        "name": "4B",+        "type": "input",+        "description": "Channel 4, Input B. Second logic input for OR gate 4."+      },+      {+        "number": "14",+        "name": "VCC",+        "type": "power_in",+        "description": "Positive supply. Operating range 2 V to 6 V (5 V nominal); absolute maximum 7 V. Bypass with a 0.1 uF ceramic capacitor to GND close to the pin."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://www.ti.com/lit/ds/symlink/sn74hc32.pdf",+        "pages": 38,+        "sha256": "f64e03a2a4c72baf",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 14,+        "described": 14,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Type": "Quad 2-input OR gate",+      "Logic family": "74HC (CMOS)",+      "Supply voltage": "2 V to 6 V",+      "Output current": "+-5.2 mA at VCC = 4.5 V",+      "Propagation delay": "9 ns typ at 5 V",+      "Operating temperature": "-40 C to 85 C"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "OR gate",+    "logic gate",+    "combinational logic",+    "signal combining"+  ],+  "discovery_pitch": "Four independent 2-input OR gates for glue logic and combining active-high signals.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -26,10 +178,5 @@     "docs/sn74hc32-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file