SN74HC240 Inverting Octal Buffer

@@ -0,0 +1,70 @@+# SN74HC240++**Texas Instruments** · Buffer / Line Driver · SOIC-20++The SN74HC240 is an octal inverting buffer and line driver with 3-state outputs, arranged as two 4-bit groups each with its own active-low output-enable. Each output is the logical inverse of its input, useful for driving buses while inverting, or for isolating two nibble-wide buses.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1OE | input | Active-low output enable for bank 1 (drives 1Y1-1Y4). Low = outputs active (inverted A data); high = outputs in high-impedance state. |+| 2 | 1A1 | input | Bank-1 data input 1; drives inverted onto 1Y1 when 1OE is low. |+| 3 | 2Y4 | tri_state | Bank-2 buffered output 4 (inverted 2A4). High-impedance when 2OE is high. |+| 4 | 1A2 | input | Bank-1 data input 2; drives inverted onto 1Y2 when 1OE is low. |+| 5 | 2Y3 | tri_state | Bank-2 buffered output 3 (inverted 2A3). High-impedance when 2OE is high. |+| 6 | 1A3 | input | Bank-1 data input 3; drives inverted onto 1Y3 when 1OE is low. |+| 7 | 2Y2 | tri_state | Bank-2 buffered output 2 (inverted 2A2). High-impedance when 2OE is high. |+| 8 | 1A4 | input | Bank-1 data input 4; drives inverted onto 1Y4 when 1OE is low. |+| 9 | 2Y1 | tri_state | Bank-2 buffered output 1 (inverted 2A1). High-impedance when 2OE is high. |+| 10 | GND | power_in | Ground reference (0 V). |+| 11 | 2A1 | input | Bank-2 data input 1; drives inverted onto 2Y1 when 2OE is low. |+| 12 | 1Y4 | tri_state | Bank-1 buffered output 4 (inverted 1A4). High-impedance when 1OE is high. |+| 13 | 2A2 | input | Bank-2 data input 2; drives inverted onto 2Y2 when 2OE is low. |+| 14 | 1Y3 | tri_state | Bank-1 buffered output 3 (inverted 1A3). High-impedance when 1OE is high. |+| 15 | 2A3 | input | Bank-2 data input 3; drives inverted onto 2Y3 when 2OE is low. |+| 16 | 1Y2 | tri_state | Bank-1 buffered output 2 (inverted 1A2). High-impedance when 1OE is high. |+| 17 | 2A4 | input | Bank-2 data input 4; drives inverted onto 2Y4 when 2OE is low. |+| 18 | 1Y1 | tri_state | Bank-1 buffered output 1 (inverted 1A1). High-impedance when 1OE is high. |+| 19 | 2OE | input | Active-low output enable for bank 2 (drives 2Y1-2Y4). Low = outputs active (inverted A data); high = outputs in high-impedance state. |+| 20 | VCC | power_in | Positive supply, 2 V to 6 V recommended operating range. |++## Key specifications++| Parameter | Value |+|---|---|+| Type | Octal inverting buffer / line driver, 3-state |+| Logic family | 74HC (CMOS) |+| Configuration | 8 inverting buffers, two 4-bit banks |+| Supply voltage | 2 V to 6 V |+| Output current | +-6 mA at VCC = 4.5 V |+| Propagation delay | 11 ns typ at 5 V |+| Operating temperature | -40 C to 85 C |++## Ordering variants++- `SN74HC240DW`+- `SN74HC240DB`+- `SN74HC240DGS`+- `SN74HC240N`+- `SN74HC240NS`+- `SN74HC240PW`+- `SN74HC240J`+- `SN74HC240FK`+- `SN74HC240W`++## CAD (KiCad official)++- Symbol: `sn74hc240.kicad_sym`+- Footprint: `sn74hc240.kicad_mod`+- 3D model: SOIC-20 wide body from KiCad `Package_SO/SOIC-20W_7.5x12.8mm_P1.27mm`.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn74hc240.pdf) (35 pp, sha256 `5d711e6c13cd01a1`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn74hc240-datasheet.pdf)

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