SN74HC21DR

@@ -0,0 +1,59 @@+# SN74HC21DR++**Texas Instruments** · Gates · SOIC-14++SN74HC21DR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1A | input | Channel 1, Input A. CMOS logic input to gate 1 (VIH ≥ 3.15 V @ VCC = 4.5 V; VIL ≤ 1.35 V @ VCC = 4.5 V). |+| 2 | 1B | input | Channel 1, Input B. CMOS logic input to gate 1. |+| 3 | NC | unconnected | Not internally connected. Leave floating or tie to any potential. |+| 4 | 1C | input | Channel 1, Input C. CMOS logic input to gate 1. |+| 5 | 1D | input | Channel 1, Input D. CMOS logic input to gate 1. |+| 6 | 1Y | output | Channel 1, Output Y. 1Y = 1A · 1B · 1C · 1D. CMOS push-pull output; IOL/IOH up to ±5.2 mA at VCC = 6 V. |+| 7 | GND | power_in | Ground return, 0 V reference for VCC and all inputs/outputs. |+| 8 | 2Y | output | Channel 2, Output Y. 2Y = 2A · 2B · 2C · 2D. CMOS push-pull output; IOL/IOH up to ±5.2 mA at VCC = 6 V. |+| 9 | 2A | input | Channel 2, Input A. CMOS logic input to gate 2. |+| 10 | 2B | input | Channel 2, Input B. CMOS logic input to gate 2. |+| 11 | NC | unconnected | Not internally connected. Leave floating or tie to any potential. |+| 12 | 2C | input | Channel 2, Input C. CMOS logic input to gate 2. |+| 13 | 2D | input | Channel 2, Input D. CMOS logic input to gate 2. |+| 14 | VCC | power_in | Positive supply, 2 V to 6 V (absolute maximum 7 V). Bypass with a 0.1 µF ceramic capacitor to GND close to the pin. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-14 |+| Category | Logic |+| Pins | 14 |++## Ordering variants++- `SN74HC21DRD`+- `SN74HC21DRDR`+- `SN74HC21DRN`+- `SN74HC21DRNS`+- `SN74HC21DRPW`+- `SN74HC21DRJ`+- `SN74HC21DRFK`++## CAD (KiCad official)++- Symbol: `SN74HC21DR`+- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`+- 3D model: SOIC-14 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn74hc21.pdf) (34 pp, sha256 `d9553773c8d57248`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn74hc21dr-datasheet.pdf)

@@ -0,0 +1,34 @@+{+  "slug": "sn74hc21dr",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "logic",+    "sn74hc21dr"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "sn74hc21dr.kicad_sym",+    "sn74hc21dr.kicad_mod",+    "sn74hc21dr.glb",+    "sn74hc21dr.step",+    "sn74hc21dr.lbr",+    "docs/hero.png",+    "docs/sn74hc21dr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file