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sn74hc193dr: factory component page (tier=mfr)

Ray ·c0e09a8c48 · ·parent fa570b1
1 file changed +164−8
page.json+164−8
@@ -1,13 +1,174 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "sn74hc193dr",+  "title": "SN74HC193DR",+  "brief": "Texas Instruments Counters / Dividers, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "Texas Instruments Counters / Dividers, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "logic",     "sn74hc193dr"   ],+  "component": {+    "mpn": "SN74HC193DR",+    "manufacturer": "Texas Instruments",+    "package": "SOIC-16",+    "pin_count": 16,+    "category": "Logic",+    "subcategory": "Counters / Dividers",+    "datasheet": "https://www.ti.com/lit/ds/symlink/sn74hc193.pdf",+    "parts": {+      "symbol": "sn74hc193dr.kicad_sym",+      "footprint": "sn74hc193dr.kicad_mod",+      "model_3d": "sn74hc193dr.glb",+      "model_3d_step": "sn74hc193dr.step",+      "lbr": "sn74hc193dr.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "B",+        "type": "input",+        "description": "Parallel data input B (bit 1). Preset value loaded into flip-flop QB when LOAD is low. High-level input threshold 3.15 V at VCC=4.5 V; input current 1 uA max."+      },+      {+        "number": "2",+        "name": "QB",+        "type": "output",+        "description": "Counter data output bit 1 (QB). CMOS push-pull output; +/-4 mA drive at 5 V; can drive up to 10 LSTTL loads."+      },+      {+        "number": "3",+        "name": "QA",+        "type": "output",+        "description": "Counter data output bit 0 (QA, LSB). CMOS push-pull output; +/-4 mA drive at 5 V."+      },+      {+        "number": "4",+        "name": "DOWN",+        "type": "input",+        "description": "Count-down clock input. Counter decrements on a low-to-high transition of DOWN while UP is held high. Rise/fall time <= 500 ns at VCC=4.5 V."+      },+      {+        "number": "5",+        "name": "UP",+        "type": "input",+        "description": "Count-up clock input. Counter increments on a low-to-high transition of UP while DOWN is held high."+      },+      {+        "number": "6",+        "name": "QC",+        "type": "output",+        "description": "Counter data output bit 2 (QC). CMOS push-pull output; +/-4 mA drive at 5 V."+      },+      {+        "number": "7",+        "name": "QD",+        "type": "output",+        "description": "Counter data output bit 3 (QD, MSB). CMOS push-pull output; +/-4 mA drive at 5 V."+      },+      {+        "number": "8",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference (0 V). Continuous current through VCC or GND +/-50 mA max."+      },+      {+        "number": "9",+        "name": "D",+        "type": "input",+        "description": "Parallel data input D (bit 3, MSB). Preset value loaded into flip-flop QD when LOAD is low."+      },+      {+        "number": "10",+        "name": "C",+        "type": "input",+        "description": "Parallel data input C (bit 2). Preset value loaded into flip-flop QC when LOAD is low."+      },+      {+        "number": "11",+        "name": "LOAD",+        "type": "input",+        "description": "Asynchronous parallel-load enable, active-low. Driving LOAD low forces the counter outputs to match the A/B/C/D data inputs, independent of the count clocks."+      },+      {+        "number": "12",+        "name": "CO",+        "type": "output",+        "description": "Carry output, active-low. Produces a low-level pulse when the count reaches maximum (15) and UP is low. Feed to the UP input of the next stage to cascade counters."+      },+      {+        "number": "13",+        "name": "BO",+        "type": "output",+        "description": "Borrow output, active-low. Produces a low-level pulse when the count is zero (all outputs low) and DOWN is low. Feed to the DOWN input of the next stage to cascade counters."+      },+      {+        "number": "14",+        "name": "CLR",+        "type": "input",+        "description": "Asynchronous clear, active-high. When high, forces all Q outputs to logic low regardless of LOAD, data, or count inputs."+      },+      {+        "number": "15",+        "name": "A",+        "type": "input",+        "description": "Parallel data input A (bit 0, LSB). Preset value loaded into flip-flop QA when LOAD is low."+      },+      {+        "number": "16",+        "name": "VCC",+        "type": "power_in",+        "description": "Positive supply voltage. Operating range 2 V to 6 V (5 V nominal); absolute max 7 V. Quiescent current 80 uA max."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://www.ti.com/lit/ds/symlink/sn74hc193.pdf",+        "pages": 23,+        "sha256": "6ce6f3e3f359c50c",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 16,+        "described": 16,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "Texas Instruments",+      "Package": "SOIC-16",+      "Category": "Logic",+      "Pins": "16"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "sn74hc193dr"+  ],+  "discovery_pitch": "SN74HC193DR (Texas Instruments) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +186,5 @@     "docs/sn74hc193dr-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file