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Set visibility: public

Ray ·c9f7920df0 · ·parent 3967e40
1 file changed +14−11
page.json+14−11
@@ -38,31 +38,31 @@         "number": "2",         "name": "B",         "type": "input",-        "description": "Gated Serial Input 2. AND-gated with input A to form the serial data into the first flip-flop; a low on B inhibits new data entry. Input current \u00b11 \u00b5A max."+        "description": "Gated Serial Input 2. AND-gated with input A to form the serial data into the first flip-flop; a low on B inhibits new data entry. Input current ±1 µA max."       },       {         "number": "3",         "name": "QA",         "type": "output",-        "description": "Parallel output bit A (first stage of the shift register). Drives \u00b14 mA at VCC=5 V into 10 LSTTL loads."+        "description": "Parallel output bit A (first stage of the shift register). Drives ±4 mA at VCC=5 V into 10 LSTTL loads."       },       {         "number": "4",         "name": "QB",         "type": "output",-        "description": "Parallel output bit B (second stage of the shift register). CMOS push-pull output; \u00b14 mA drive at 5 V."+        "description": "Parallel output bit B (second stage of the shift register). CMOS push-pull output; ±4 mA drive at 5 V."       },       {         "number": "5",         "name": "QC",         "type": "output",-        "description": "Parallel output bit C (third stage of the shift register). CMOS push-pull output; \u00b14 mA drive at 5 V."+        "description": "Parallel output bit C (third stage of the shift register). CMOS push-pull output; ±4 mA drive at 5 V."       },       {         "number": "6",         "name": "QD",         "type": "output",-        "description": "Parallel output bit D (fourth stage of the shift register). CMOS push-pull output; \u00b14 mA drive at 5 V."+        "description": "Parallel output bit D (fourth stage of the shift register). CMOS push-pull output; ±4 mA drive at 5 V."       },       {         "number": "7",@@ -86,31 +86,31 @@         "number": "10",         "name": "QE",         "type": "output",-        "description": "Parallel output bit E (fifth stage of the shift register). CMOS push-pull output; \u00b14 mA drive at 5 V."+        "description": "Parallel output bit E (fifth stage of the shift register). CMOS push-pull output; ±4 mA drive at 5 V."       },       {         "number": "11",         "name": "QF",         "type": "output",-        "description": "Parallel output bit F (sixth stage of the shift register). CMOS push-pull output; \u00b14 mA drive at 5 V."+        "description": "Parallel output bit F (sixth stage of the shift register). CMOS push-pull output; ±4 mA drive at 5 V."       },       {         "number": "12",         "name": "QG",         "type": "output",-        "description": "Parallel output bit G (seventh stage of the shift register). CMOS push-pull output; \u00b14 mA drive at 5 V."+        "description": "Parallel output bit G (seventh stage of the shift register). CMOS push-pull output; ±4 mA drive at 5 V."       },       {         "number": "13",         "name": "QH",         "type": "output",-        "description": "Parallel output bit H (eighth/last stage of the shift register). CMOS push-pull output; \u00b14 mA drive at 5 V."+        "description": "Parallel output bit H (eighth/last stage of the shift register). CMOS push-pull output; ±4 mA drive at 5 V."       },       {         "number": "14",         "name": "VCC",         "type": "power_in",-        "description": "Positive supply voltage, 2 V to 6 V (recommended 5 V nominal). ICC max 8 \u00b5A at 25 \u00b0C."+        "description": "Positive supply voltage, 2 V to 6 V (recommended 5 V nominal). ICC max 8 µA at 25 °C."       }     ],     "provenance": {@@ -174,5 +174,8 @@     "docs/sn74hc164pwr-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ]+  ],+  "visibility": {+    "public": true+  } }\ No newline at end of file