SN74HC164PWR

@@ -0,0 +1,60 @@+# SN74HC164PWR++**Texas Instruments** · Shifting Register · TSSOP-14++SN74HC164PWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | A | input | Gated Serial Input 1. AND-gated with input B to form the serial data into the first flip-flop; a low on A inhibits new data entry and resets the first flip-flop on the next CLK rising edge. VIH min 1.5 V at VCC=2 V, 3.15 V at VCC=4.5 V. |+| 2 | B | input | Gated Serial Input 2. AND-gated with input A to form the serial data into the first flip-flop; a low on B inhibits new data entry. Input current ±1 µA max. |+| 3 | QA | output | Parallel output bit A (first stage of the shift register). Drives ±4 mA at VCC=5 V into 10 LSTTL loads. |+| 4 | QB | output | Parallel output bit B (second stage of the shift register). CMOS push-pull output; ±4 mA drive at 5 V. |+| 5 | QC | output | Parallel output bit C (third stage of the shift register). CMOS push-pull output; ±4 mA drive at 5 V. |+| 6 | QD | output | Parallel output bit D (fourth stage of the shift register). CMOS push-pull output; ±4 mA drive at 5 V. |+| 7 | GND | power_in | Ground reference (0 V). |+| 8 | CLK | input | Clock input. Data is shifted one position on the low-to-high transition; fmax up to 36 MHz typical at VCC=6 V. Minimum high/low pulse width 14 ns at 6 V. |+| 9 | CLR | input | Asynchronous active-low clear. Driving CLR low forces all Q outputs (QA..QH) to logic 0 independent of CLK. Minimum low pulse width 17 ns at VCC=6 V. |+| 10 | QE | output | Parallel output bit E (fifth stage of the shift register). CMOS push-pull output; ±4 mA drive at 5 V. |+| 11 | QF | output | Parallel output bit F (sixth stage of the shift register). CMOS push-pull output; ±4 mA drive at 5 V. |+| 12 | QG | output | Parallel output bit G (seventh stage of the shift register). CMOS push-pull output; ±4 mA drive at 5 V. |+| 13 | QH | output | Parallel output bit H (eighth/last stage of the shift register). CMOS push-pull output; ±4 mA drive at 5 V. |+| 14 | VCC | power_in | Positive supply voltage, 2 V to 6 V (recommended 5 V nominal). ICC max 8 µA at 25 °C. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-14 |+| Category | Logic |+| Pins | 14 |++## Ordering variants++- `SN74HC164PWRPW`+- `SN74HC164PWRPWR`+- `SN74HC164PWRD`+- `SN74HC164PWRN`+- `SN74HC164PWRNS`+- `SN74HC164PWRJ`+- `SN74HC164PWRW`+- `SN74HC164PWRFK`++## CAD (KiCad official)++- Symbol: `SN74HC164PWR`+- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`+- 3D model: TSSOP-14 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn74hc164.pdf) (38 pp, sha256 `51860c45fddf000a`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn74hc164pwr-datasheet.pdf)

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