SN74HC164 Shift Register

@@ -1,8 +1,11 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "sn74hc164",+  "title": "SN74HC164 Shift Register",+  "brief": "8-bit serial-in, parallel-out shift register with gated serial inputs.",   "version": "0.1.0",-  "type": "component",-  "description": "8-bit serial-in, parallel-out shift register with gated serial inputs.",+  "license": "CC-BY-SA-4.0",   "tags": [     "logic",     "shift-register",@@ -12,6 +15,156 @@     "ti",     "soic-14"   ],+  "component": {+    "mpn": "SN74HC164",+    "manufacturer": "Texas Instruments",+    "package": "SOIC-14",+    "pin_count": 14,+    "category": "Logic",+    "subcategory": "Shift Register",+    "datasheet": "https://www.ti.com/lit/ds/symlink/sn74hc164.pdf",+    "parts": {+      "symbol": "sn74hc164.kicad_sym",+      "footprint": "sn74hc164.kicad_mod",+      "model_3d": "sn74hc164.glb"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "A",+        "type": "input",+        "description": "Gated Serial Input 1. AND-gated with input B to form the serial data fed into the first flip-flop on the rising edge of CLK. A low on either A or B inhibits new data entry and forces the first stage low on the next clock."+      },+      {+        "number": "2",+        "name": "B",+        "type": "input",+        "description": "Gated Serial Input 2. AND-gated with input A to gate serial data into the register on the rising edge of CLK."+      },+      {+        "number": "3",+        "name": "QA",+        "type": "output",+        "description": "Parallel output, bit A (first stage of the 8-bit shift register). CMOS push-pull output; \u00b14 mA drive at 5 V."+      },+      {+        "number": "4",+        "name": "QB",+        "type": "output",+        "description": "Parallel output, bit B (second stage of the shift register)."+      },+      {+        "number": "5",+        "name": "QC",+        "type": "output",+        "description": "Parallel output, bit C (third stage of the shift register)."+      },+      {+        "number": "6",+        "name": "QD",+        "type": "output",+        "description": "Parallel output, bit D (fourth stage of the shift register)."+      },+      {+        "number": "7",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference (0 V). Must be connected to system ground."+      },+      {+        "number": "8",+        "name": "CLK",+        "type": "input",+        "description": "Clock input. Data at the serial inputs is shifted into the register on the low-to-high transition of CLK. Maximum clock frequency 31 MHz typ at VCC = 4.5 V."+      },+      {+        "number": "9",+        "name": "CLR",+        "type": "input",+        "description": "Active-low asynchronous clear. A low level on CLR forces all eight Q outputs low regardless of the state of CLK. Overbar in datasheet indicates active-low."+      },+      {+        "number": "10",+        "name": "QE",+        "type": "output",+        "description": "Parallel output, bit E (fifth stage of the shift register)."+      },+      {+        "number": "11",+        "name": "QF",+        "type": "output",+        "description": "Parallel output, bit F (sixth stage of the shift register)."+      },+      {+        "number": "12",+        "name": "QG",+        "type": "output",+        "description": "Parallel output, bit G (seventh stage of the shift register)."+      },+      {+        "number": "13",+        "name": "QH",+        "type": "output",+        "description": "Parallel output, bit H (eighth/last stage of the shift register). Also serves as the serial data-out when cascading multiple 'HC164 devices."+      },+      {+        "number": "14",+        "name": "VCC",+        "type": "power_in",+        "description": "Positive supply, 2 V to 6 V (5 V nominal). Bypass with a 0.1 uF ceramic capacitor to GND close to the pin."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://www.ti.com/lit/ds/symlink/sn74hc164.pdf",+        "pages": 38,+        "sha256": "51860c45fddf000a",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 14,+        "described": 14,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Type": "8-bit serial-in parallel-out shift register",+      "Logic family": "74HC (CMOS)",+      "Serial inputs": "Two, AND-gated (A and B)",+      "Clear": "Active-low, asynchronous",+      "Supply voltage": "2 V to 6 V",+      "Max clock": "57 MHz typ at 5 V",+      "Operating temperature": "-40 C to 85 C"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "serial to parallel",+    "SIPO shift register",+    "add outputs",+    "LED driver expansion"+  ],+  "discovery_pitch": "Turn one serial data line into eight parallel outputs, chainable for more, the input-side complement of the 74HC595.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -27,10 +180,5 @@     "docs/sn74hc164-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file