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SN74HC132
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TI quad 2-input NAND with Schmitt-trigger inputs, SOIC-14. Hysteresis cleans noisy signals. HC 2-6 V. Datasheet-verified.
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README.mdadded+58@@ -0,0 +1,58 @@+# SN74HC132++**Texas Instruments** · Quad 2-input NAND Schmitt trigger · SOIC-14++Four 2-input NAND gates with Schmitt-trigger inputs in high-speed CMOS, SOIC-14. The hysteresis on each input means a slow, noisy, or ringing signal produces a single clean output transition instead of chattering, so these gates both perform NAND logic and condition ugly signals. That makes the 74HC132 a favorite for debouncing switches, squaring up sensor and RC waveforms, and building simple relaxation oscillators (one gate plus an RC). It combines the NAND of the 74HC00 with the input conditioning of the 74HC14 Schmitt inverter. Runs 2-6 V.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1A | input | Gate 1 Schmitt-trigger input A. Typical hysteresis 0.9 V at VCC=4.5 V (VT+ ~1.55 V, VT- ~0.9 V). Input voltage range 0 to VCC. |+| 2 | 1B | input | Gate 1 Schmitt-trigger input B. Typical hysteresis 0.9 V at VCC=4.5 V. Input voltage range 0 to VCC. |+| 3 | 1Y | output | Gate 1 NAND output, Y = NOT(1A AND 1B). Push-pull CMOS output; VOH ≥ 3.98 V and VOL ≤ 0.26 V at VCC=4.5 V, IOH/IOL = ±4 mA. |+| 4 | 2A | input | Gate 2 Schmitt-trigger input A. Typical hysteresis 0.9 V at VCC=4.5 V. Input voltage range 0 to VCC. |+| 5 | 2B | input | Gate 2 Schmitt-trigger input B. Typical hysteresis 0.9 V at VCC=4.5 V. Input voltage range 0 to VCC. |+| 6 | 2Y | output | Gate 2 NAND output, Y = NOT(2A AND 2B). Push-pull CMOS output; VOH ≥ 3.98 V and VOL ≤ 0.26 V at VCC=4.5 V, IOH/IOL = ±4 mA. |+| 7 | GND | power_in | Ground reference. All input and output voltages are measured with respect to this pin. |+| 8 | 3Y | output | Gate 3 NAND output, Y = NOT(3A AND 3B). Push-pull CMOS output; VOH ≥ 3.98 V and VOL ≤ 0.26 V at VCC=4.5 V, IOH/IOL = ±4 mA. |+| 9 | 3A | input | Gate 3 Schmitt-trigger input A. Typical hysteresis 0.9 V at VCC=4.5 V. Input voltage range 0 to VCC. |+| 10 | 3B | input | Gate 3 Schmitt-trigger input B. Typical hysteresis 0.9 V at VCC=4.5 V. Input voltage range 0 to VCC. |+| 11 | 4Y | output | Gate 4 NAND output, Y = NOT(4A AND 4B). Push-pull CMOS output; VOH ≥ 3.98 V and VOL ≤ 0.26 V at VCC=4.5 V, IOH/IOL = ±4 mA. |+| 12 | 4A | input | Gate 4 Schmitt-trigger input A. Typical hysteresis 0.9 V at VCC=4.5 V. Input voltage range 0 to VCC. |+| 13 | 4B | input | Gate 4 Schmitt-trigger input B. Typical hysteresis 0.9 V at VCC=4.5 V. Input voltage range 0 to VCC. |+| 14 | VCC | power_in | Positive supply. Recommended operating range 2 V to 6 V (5 V nominal). Absolute maximum 7 V. Bypass with a 100 nF ceramic capacitor to GND close to the pin. |++## Key specifications++| Parameter | Value |+|---|---|+| Type | Quad 2-input NAND, Schmitt inputs |+| Gates | 4 independent |+| Function | Y = NOT (A AND B), hysteresis inputs |+| Hysteresis | ~0.9 V at VCC=4.5 V |+| Logic family | HC (high-speed CMOS) |+| Supply voltage | 2-6 V |+| Common uses | debounce, oscillators, edge cleanup |+| Package | SOIC-14 |++## Ordering variants++- `SN74HC132D (SOIC-14, tube)`+- `SN74HC132DR (SOIC-14, tape & reel)`++## CAD (KiCad official)++- Symbol: `74xx:74LS132 (pin-compatible with 74HC132)`+- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`+- 3D model: SOIC-14 (KiCad packages3D)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn74hc132.pdf) (43 pp, sha256 `6db63c21be2f2971`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn74hc132-datasheet.pdf)
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